search for: nvkm_notify_get

...ea1cc92 dd694d34 dd5c9f04 dea2e3b6 00000000 00000005 deae3e69 [ 155.100004] ffffffff 00000001 ffffffff ffffffff ffffffff 00000000 00000000 dd451c70 [ 155.100004] c05bc820 ffffffff 00000000 dd694c60 dd694d34 00000000 dd5b8070 dd5c9f44 [ 155.100004] Call Trace: [ 155.100004] [<dea1cc92>] nvkm_notify_get+0x32/0x40 [nouveau] [ 155.100004] [<dea2e3b6>] nouveau_pstate_work+0x396/0x3a0 [nouveau] [ 155.100004] [<c1047fa7>] process_one_work+0x1d7/0x340 [ 155.100004] [<c10485bf>] worker_thread+0x2af/0x380 [ 155.100004] [<c1048310>] ? rescuer_thread+0x1d0/0x1d0 [ 155.100004...

...tate_work(struct work_struct *work) > +nvkm_clk_update_work(struct work_struct *work) > { > struct nvkm_clk *clk = container_of(work, typeof(*clk), work); > struct nvkm_subdev *subdev = &clk->subdev; > @@ -332,9 +332,15 @@ nvkm_pstate_work(struct work_struct *work) > nvkm_notify_get(&clk->pwrsrc_ntfy); > } > > -static int > -nvkm_pstate_calc(struct nvkm_clk *clk, bool wait) > +int > +nvkm_clk_update(struct nvkm_clk *clk, bool wait) > { > + if (!clk) > + return -EINVAL; > + > + if (!clk->allow_reclock) > + return -ENODEV; >...

...: %d\n", pstate, ret); } +} + +static void +nvkm_clk_update_work(struct work_struct *work) +{ + struct nvkm_clk *clk = container_of(work, typeof(*clk), work); + + if (!atomic_xchg(&clk->waiting, 0)) + return; + + nvkm_clk_update_impl(clk); wake_up_all(&clk->wait); nvkm_notify_get(&clk->pwrsrc_ntfy); -- 2.8.1

...all into the code if the GPU is powered on + if (!pm_runtime_suspended(dev)) { + // it would be a shame if the GPU goes into suspend + // while doing the reclock + pm_runtime_get_sync(dev); + clk->func->update(clk, pstate); + pm_runtime_put(dev); + } wake_up_all(&clk->wait); nvkm_notify_get(&clk->pwrsrc_ntfy); -- 2.12.0

...ei) } static void -nvkm_pstate_work(struct work_struct *work) +nvkm_clk_update_work(struct work_struct *work) { struct nvkm_clk *clk = container_of(work, typeof(*clk), work); struct nvkm_subdev *subdev = &clk->subdev; @@ -332,9 +332,15 @@ nvkm_pstate_work(struct work_struct *work) nvkm_notify_get(&clk->pwrsrc_ntfy); } -static int -nvkm_pstate_calc(struct nvkm_clk *clk, bool wait) +int +nvkm_clk_update(struct nvkm_clk *clk, bool wait) { + if (!clk) + return -EINVAL; + + if (!clk->allow_reclock) + return -ENODEV; + atomic_set(&clk->waiting, 1); schedule_work(&cl...

...ei) } static void -nvkm_pstate_work(struct work_struct *work) +nvkm_clk_update_work(struct work_struct *work) { struct nvkm_clk *clk = container_of(work, typeof(*clk), work); struct nvkm_subdev *subdev = &clk->subdev; @@ -332,9 +332,15 @@ nvkm_pstate_work(struct work_struct *work) nvkm_notify_get(&clk->pwrsrc_ntfy); } -static int -nvkm_pstate_calc(struct nvkm_clk *clk, bool wait) +int +nvkm_clk_update(struct nvkm_clk *clk, bool wait) { + if (!clk) + return -EINVAL; + + if (!clk->allow_reclock) + return -ENODEV; + atomic_set(&clk->waiting, 1); schedule_work(&cl...

...tate); + clk->func->update(clk, pstate, force); } static void @@ -360,7 +360,7 @@ nvkm_clk_update_work(struct work_struct *work) if (!atomic_xchg(&clk->waiting, 0)) return; - nvkm_clk_update_impl(clk); + nvkm_clk_update_impl(clk, false); wake_up_all(&clk->wait); nvkm_notify_get(&clk->pwrsrc_ntfy); @@ -613,11 +613,7 @@ nvkm_clk_init(struct nvkm_subdev *subdev) if (clk->func->init) return clk->func->init(clk); - clk->astate = -1; - clk->pstate = NULL; - clk->exp_cstate = NVKM_CLK_CSTATE_DEFAULT; - clk->set_cstate = NULL; - nvkm_clk_upda...

...lk, pstate); - if (ret) { - nvkm_error(subdev, "error setting pstate %d: %d\n", - pstate, ret); - } + ret = nvkm_pstate_prog(clk, pstate); + if (ret) { + nvkm_error(subdev, "error setting pstate %d: %d\n", + pstate, ret); } wake_up_all(&clk->wait); nvkm_notify_get(&clk->pwrsrc_ntfy); } -static int -nvkm_pstate_calc(struct nvkm_clk *clk, bool wait) +int +nvkm_clk_update(struct nvkm_clk *clk, bool wait) { + if (!clk) + return -EINVAL; + + if (!clk->allow_reclock) + return -ENODEV; + atomic_set(&clk->waiting, 1); schedule_work(&cl...

...ea1ce02 dce7cb28 dd721f04 dea2f386 00000000 00000005 deaea246 [ 290.180008] ffffffff 00000001 ffffffff ffffffff ffffffff 00000000 00000000 dd71c000 [ 290.180008] dce07670 ffffffff 00000000 dce7ca50 dce7cb28 00000000 dd6f8e70 dd721f44 [ 290.180008] Call Trace: [ 290.180008] [<dea1ce02>] nvkm_notify_get+0x32/0x40 [nouveau] [ 290.180008] [<dea2f386>] nouveau_pstate_work+0x396/0x3a0 [nouveau] [ 290.180008] [<c1048af7>] process_one_work+0x1d7/0x360 [ 290.180008] [<c104912f>] worker_thread+0x2af/0x380 [ 290.180008] [<c1048e80>] ? rescuer_thread+0x1d0/0x1d0 [ 290.180008...

This series addresses various issues inside the reclocking code: 1. after resume the set clocks are reset 2. reclocking not possible while GPU is suspended 3. nouveau always does full reclocks even if only a change of the voltage is required Some of the patches were part of the bigger reclocking series I sent months ago, some things have changed though. This is also preparation work of

This series addresses various issues inside the reclocking code: 1. after resume the set clocks are reset 2. reclocking not possible while GPU is suspended Some of the patches were part of the bigger reclocking series I sent months ago, some things have changed though. This is also preparation work of changing the clock state due to temperature changes and dynamic reclocking. v2: remove commits

This series addresses various issues inside the reclocking code: 1. after resume the set clocks are reset 2. reclocking not possible while GPU is suspended 3. racy reclocking while GPU is suspending and leading to hangs Some of the patches were part of the bigger reclocking series I sent months ago, some things have changed though. This is also preparation work of changing the clock state due to

We are slowly getting there! v4 of the series with some realy good improvements, so I am sure this is like 95% done and only needs some proper polishing and proper Reviews! I also added the NvVoltOffsetmV module parameter, so that a user is able to over and !under!-volt the GPU. Overvolting makes sense, when there are still some reclocking issues left, which might be solved by a higher voltage.

This is an updated series for the old clocking improvement one. I think I got everything needed in place and also a simple update mechanism for updating the cstates/voltage on temperature changes. If anything is unclear how I REed or got the information, please leave a note so that I can provide additional information in the commits. Besides that I think we are pretty close now and only some

Adds Nouveau controlled thermal throttling for Kepler+ GPUs. With this I feel safe enough to add support for Maxwell2 reclocking later on (still hidden behind a switch, but we can be fairly sure to not overheat hardware if a user isn't carefull enough) Contains all patches from my clk update series, but I thought it makes sense to include those in this series as well for completness. Please

Just wanted to post updated versions of my last series/patches. Reviews welcomed. It would be also nice if we agree on features I should focus upstreaming, so that this work can be better splitted or reordered. Sadly most of my patches depend on the rather big clk subdev rework and I think those patches shows best, why I think this rework is actually needed and makes things much easier to add

Last update here: https://lists.freedesktop.org/archives/nouveau/2017-September/028848.html Basically big cleanup, reordering, simplifications and some renaming to make the code easier to read and to review. I also moved some bugfixes to the front so they can be merged prior the other patches. There was also a bug related to the therm daemon triggering a pstate change leading to PMU lockups,