Displaying 12 results from an estimated 12 matches for "nvkm_memx_unblock".
2017 Apr 10
0
[PATCH 10/11] nvkm/pmu/memx: init script -> memx translation
...b..b9c46ef 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h
@@ -50,4 +50,6 @@ void nvkm_memx_train(struct nvkm_memx *);
int nvkm_memx_train_result(struct nvkm_pmu *, u32 *, int);
void nvkm_memx_block(struct nvkm_memx *);
void nvkm_memx_unblock(struct nvkm_memx *);
+void nvkm_memx_init_run(struct nvkm_memx *memx, struct nvkm_bios *bios,
+ u16 offset, u8 ramcfg);
#endif
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramfuc.h b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramfuc.h
index 9ef9d6a..614e716 100644
--- a/drivers/gpu/drm/nouveau...
2015 Oct 26
1
[PATCH 4/4] nouveau/debugfs: add interface for current load
...u32 message, u32 data0, u32 data1);
> void nvkm_pmu_pgob(struct nvkm_pmu *, bool enable);
> @@ -48,4 +55,7 @@ void nvkm_memx_train(struct nvkm_memx *);
> int nvkm_memx_train_result(struct nvkm_pmu *, u32 *, int);
> void nvkm_memx_block(struct nvkm_memx *);
> void nvkm_memx_unblock(struct nvkm_memx *);
> +
> +/* interface to PERF process running on PMU */
> +int nvkm_pmu_get_perf_data(struct nvkm_pmu *, struct nvkm_pmu_load_data *);
> #endif
> diff --git a/drm/nouveau/nouveau_debugfs.c b/drm/nouveau/nouveau_debugfs.c
> index 5392e07..ec3d3d3 100644
> ---...
2015 Oct 26
0
[PATCH 4/4] nouveau/debugfs: add interface for current load
...m_pmu *, u32 reply[2], u32 process,
u32 message, u32 data0, u32 data1);
void nvkm_pmu_pgob(struct nvkm_pmu *, bool enable);
@@ -48,4 +55,7 @@ void nvkm_memx_train(struct nvkm_memx *);
int nvkm_memx_train_result(struct nvkm_pmu *, u32 *, int);
void nvkm_memx_block(struct nvkm_memx *);
void nvkm_memx_unblock(struct nvkm_memx *);
+
+/* interface to PERF process running on PMU */
+int nvkm_pmu_get_perf_data(struct nvkm_pmu *, struct nvkm_pmu_load_data *);
#endif
diff --git a/drm/nouveau/nouveau_debugfs.c b/drm/nouveau/nouveau_debugfs.c
index 5392e07..ec3d3d3 100644
--- a/drm/nouveau/nouveau_debugfs.c
++...
2015 Oct 26
0
[PATCH v2 4/4] nouveau/debugfs: add interface for current load
...m_pmu *, u32 reply[2], u32 process,
u32 message, u32 data0, u32 data1);
void nvkm_pmu_pgob(struct nvkm_pmu *, bool enable);
@@ -48,4 +55,7 @@ void nvkm_memx_train(struct nvkm_memx *);
int nvkm_memx_train_result(struct nvkm_pmu *, u32 *, int);
void nvkm_memx_block(struct nvkm_memx *);
void nvkm_memx_unblock(struct nvkm_memx *);
+
+/* interface to PERF process running on PMU */
+int nvkm_pmu_get_perf_data(struct nvkm_pmu *, struct nvkm_pmu_load_data *);
#endif
diff --git a/drm/nouveau/nouveau_debugfs.c b/drm/nouveau/nouveau_debugfs.c
index 5392e07..ec3d3d3 100644
--- a/drm/nouveau/nouveau_debugfs.c
++...
2015 Oct 26
0
[PATCH v3 4/4] nouveau/debugfs: add interface for current load
...m_pmu *, u32 reply[2], u32 process,
u32 message, u32 data0, u32 data1);
void nvkm_pmu_pgob(struct nvkm_pmu *, bool enable);
@@ -48,4 +55,7 @@ void nvkm_memx_train(struct nvkm_memx *);
int nvkm_memx_train_result(struct nvkm_pmu *, u32 *, int);
void nvkm_memx_block(struct nvkm_memx *);
void nvkm_memx_unblock(struct nvkm_memx *);
+
+/* interface to PERF process running on PMU */
+int nvkm_pmu_get_perf_data(struct nvkm_pmu *, struct nvkm_pmu_load_data *);
#endif
diff --git a/drm/nouveau/nouveau_debugfs.c b/drm/nouveau/nouveau_debugfs.c
index 5392e07..ec3d3d3 100644
--- a/drm/nouveau/nouveau_debugfs.c
++...
2017 Apr 10
11
Preparations for Fermi DRAM clock changes
No, no, these will not implement Fermi reclocking. This set of patches
contains some of the preparatory work that I deem stable enough to
move upstream. Notable changes
- Training pattern upload routines from GK104+ now shared with GT215+
- Timing calculation for Fermi
- GDDR5 MR calculation from VBIOS timing table v1.0. Also useful for that
pesky GT 240.
- A routine to translate a VBIOS init
2017 Apr 10
14
RESEND Preparations for Fermi DRAM clock changes
Two patches went missing as a result of PEBCAK. No v2 marks as nothing
changed really. Just resending for easier enforcement of patch order
in other people's trees. Sorry for the noise.
Original message:
No, no, these will not implement Fermi reclocking. This set of patches
contains some of the preparatory work that I deem stable enough to
move upstream. Notable changes
- Training pattern
2015 Oct 26
9
[PATCH 0/4] Add pdaemon load counters
this series makes use of the load counters we can use to get information about
the current load of the gpu.
This series includes the needed pmu bits and a debugfs interface to read them
out. Currently the values are between 0 and 255, because it is much easier to
implement it this way on the pmu.
Karol Herbst (4):
subdev/pmu/fuc: add gk104
pmu/fuc: add macros for pdaemon pwr counters
2016 Feb 08
4
[PATCH 0/4] PMU engine counters
these are usually used for dynamic reclocking on gt215 and newer
The counters are used to get the load of the core, memory, video and pcie loads
currently I expose the loads through a debugfs "current_load" file, but I want
to move that to nvif and just add a wrapper around that in debugfs for
convenience
Anyway there are still some issues I would like to discuss:
1. currently the
2016 Feb 16
4
[PATCH v2 0/4] PMU engine counters
these are usually used for dynamic reclocking on gt215 and newer
The counters are used to get the load of the core, memory, video and pcie loads
currently I expose the loads through a debugfs "current_load" file, but I want
to move that to nvif and just add a wrapper around that in debugfs for
convenience. Using nvif would have the advantage, that userspace tools can
easily get loads
2017 May 07
6
[RFC v2 0/6] PMU engine counters
reworked this series quite a lot.
Now we want the Host to configure the counters through the PMU.
The series isn't complete though because it needs:
1. reordering
2. better commit messages
but I felt like sending those out before doing a final version.
I also found some weird register overwriting issue on the PMU I have to track
down, because it interfers with the counter read out. I am
2017 Jun 05
7
[PATCH v3 0/7] PMU engine counters
I think I am done reworking the series and getting to a point where I think
it is basically finished. The configuration of the slots could be improved
later on when working on dynamic reclocking, but for now it's good enough to
report the current GPU utilization to userspace.
Patches 1-4 imeplement PMU commands to setup and readout the counters.
Patches 5-6 lets Nouveau make use of 1-4.
Patch