search for: nvkm_fb

...er DMA mapping of scratch page to oneinit() hook" was applied, I noticed that moving the 100c10 page allocation to the oneinit() hook resulted in that page being now allocated for Tegra as well, and accesses be made to members of gf100_fb which were not accessible because gk20a_fb_new() called nvkm_fb_new_() directly. This is fixed by patch 1, but looking at this code made me realize we may just as well use the regular FB functions for gk20a/gm20b (without the ablity to allocate VRAM of course), so patches 2 and 3 do that. Alexandre Courbot (3): fb/gk20a: fix constructor call fb/gk20a: use...

...dev/fb/gm20b.c diff --git a/drm/nouveau/include/nvkm/subdev/fb.h b/drm/nouveau/include/nvkm/subdev/fb.h index 3a410275fa71..cf681065863e 100644 --- a/drm/nouveau/include/nvkm/subdev/fb.h +++ b/drm/nouveau/include/nvkm/subdev/fb.h @@ -93,6 +93,7 @@ int gk104_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int gk20a_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int gm107_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int gm200_fb_new(struct nvkm_device *, int, struct nvkm_fb **); +int gm20b_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int gp100_fb_new(struct nvkm_devi...

...bdev/fb.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h > index adb78f7d083a..92be0e5269c6 100644 > --- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h > +++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h > @@ -75,6 +75,7 @@ int mcp89_fb_new(struct nvkm_device *, int, struct nvkm_fb **); > int gf100_fb_new(struct nvkm_device *, int, struct nvkm_fb **); > int gf108_fb_new(struct nvkm_device *, int, struct nvkm_fb **); > int gk104_fb_new(struct nvkm_device *, int, struct nvkm_fb **); > +int gk110_fb_new(struct nvkm_device *, int, struct nvkm_fb **); > int gk20...

...veau/include/nvkm/subdev/fb.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h index adb78f7d083a..92be0e5269c6 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h @@ -75,6 +75,7 @@ int mcp89_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int gf100_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int gf108_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int gk104_fb_new(struct nvkm_device *, int, struct nvkm_fb **); +int gk110_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int gk20a_fb_new(struct nvkm_devi...

...dev/fb/gp10b.c diff --git a/drm/nouveau/include/nvkm/subdev/fb.h b/drm/nouveau/include/nvkm/subdev/fb.h index 891497a0fe3b..28d513fbf44c 100644 --- a/drm/nouveau/include/nvkm/subdev/fb.h +++ b/drm/nouveau/include/nvkm/subdev/fb.h @@ -97,6 +97,7 @@ int gm200_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int gm20b_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int gp100_fb_new(struct nvkm_device *, int, struct nvkm_fb **); int gp102_fb_new(struct nvkm_device *, int, struct nvkm_fb **); +int gp10b_fb_new(struct nvkm_device *, int, struct nvkm_fb **); #include <subdev/bios.h>...

A quick look over the memory reclocking part inside the maxwell mmiotraces kind of reminded me of the kepler memory reclocking, it looks for most parts the same. I didn't do a deep inspection so treat this with great care, but it seems to work at least on those maxwell gpus this was tested on. It depends on the PMU fixes for the fuc5 though, otherwise the PMU might not work as expected and

Adds reclocking for NVA0, and a whole lot of work for other cards. Had these patches collecting dust for a little, but tested them with both my NVA0, and Martin's a while back. Success not guaranteed, but should be quite a leap forward. Happy reviewing and testing. Cheers, Roy

On Wed, Feb 11, 2015 at 2:21 AM, Alexandre Courbot <gnurou at gmail.com> wrote: > @@ -150,7 +151,10 @@ gf100_ltc_init_tag_ram(struct nvkm_fb *pfb, struct nvkm_ltc_priv *priv) > int ret; > > /* tags for 1/4 of VRAM should be enough (8192/4 per GiB of VRAM) */ > - priv->num_tags = (pfb->ram->size >> 17) / 4; > + if (pfb->ram) > + priv->num_tags = (pfb->ram...

Signed-off-by: Roy Spliet <rspliet at eclipso.eu> --- drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ramcfg.h | 1 + drivers/gpu/drm/nouveau/nvkm/subdev/bios/rammap.c | 3 ++- drivers/gpu/drm/nouveau/nvkm/subdev/bios/timing.c | 2 ++ drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr3.c | 6 ++++-- 4 files changed, 9 insertions(+), 3 deletions(-) diff --git

Hello, Attached a small patch that correctly identifies the DLLoff bit for >=GF100. Marked RFC because I haven't seen any GDDR5 samples that *enable* the DLL. I'd like to verify whether the DLL should be reset when enabled. Could increase likelihood of succesfull reclock. Ben: could you do some experiments with this bit to see if GDDR5 needs some DLL reset logic? Thanks, and happy

...nt *N, int *fN, int *M, int *P); + int *pN, int *pfN, int *pM, int *P); #endif diff --git a/drm/nouveau/nvkm/subdev/fb/priv.h b/drm/nouveau/nvkm/subdev/fb/priv.h index e905d44f..d499ab39 100644 --- a/drm/nouveau/nvkm/subdev/fb/priv.h +++ b/drm/nouveau/nvkm/subdev/fb/priv.h @@ -33,7 +33,7 @@ int nvkm_fb_new_(const struct nvkm_fb_func *, struct nvkm_device *device, int index, struct nvkm_fb **); int nvkm_fb_bios_memtype(struct nvkm_bios *); -bool nv04_fb_memtype_valid(struct nvkm_fb *, u32 memtype); +bool nv04_fb_memtype_valid(struct nvkm_fb *, u32 tile_flags); void nv10_fb_tile_init(stru...

This v4 is now a 3 piece series, after Alexandre pointed out that both GF 100 and NV50 are affected by the same issue, and that a related issue has been solved already for Tegra in commit 9d0394c6bed5 ("drm/nouveau/instmem/gk20a: set DMA mask early"). The issue that this series addresses is the fact that the Nouveau driver invokes the DMA API before setting the DMA mask. In both cases

This v4 is now a 3 piece series (since v4), after Alexandre pointed out that both GF 100 and NV50 are affected by the same issue, and that a related issue has been solved already for Tegra in commit 9d0394c6bed5 ("drm/nouveau/instmem/gk20a: set DMA mask early"). The issue that this series addresses is the fact that the Nouveau driver invokes the DMA API before setting the DMA mask. In

...ns(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c index 1b5fb02eab2a..033ca0effb7e 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c @@ -216,11 +216,30 @@ nv50_fb_init(struct nvkm_fb *base) struct nv50_fb *fb = nv50_fb(base); struct nvkm_device *device = fb->base.subdev.device; + if (!fb->r100c08) { + /* + * We are calling the DMA api way before the TTM layer sets the + * DMA mask based on the MMU subdev parameters. This means we + * are using the default DMA...

Next version of my patchseries for adding clockgating support for kepler1 and 2 on nouveau. The first version of this series can be found here: https://patchwork.freedesktop.org/series/36504/ Some minor changes: - Clarified that SLCG stands for 'secondary level clockgating', thanks for the small tip nvidia! - Removed the concept of levels, this was more useful for debugging then

Next version of my patchseries for adding clockgating support for kepler1 and 2 on nouveau. The first version of this series can be found here: https://patchwork.freedesktop.org/series/36504/ One small change: - Set therm->clkgate_enabled to false until the last patch, where we introduce the NvPmEnableGating option Lyude Paul (5): drm/nouveau: Add support for basic clockgating on

Next version of my patchseries for adding clockgating support for kepler1 and 2 on nouveau. The first version of this series can be found here: https://patchwork.freedesktop.org/series/36504/ One small change: - Add Martin's R-B, whoops Lyude Paul (5): drm/nouveau: Add support for basic clockgating on Kepler1 drm/nouveau: Add support for BLCG on Kepler1 drm/nouveau: Add support for

Next version of my patchseries for adding clockgating support for kepler1 and 2 on nouveau. The first version of this series can be found here: https://patchwork.freedesktop.org/series/36504/ Some small changes (shouldn't change anything functionally): - Made gf100_therm_new, gk104_clkgate_pack, and gk110_fb_clkgate_blcg_init_unk_0 static (re: kbuild test bot) - Making all three of

...(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c index 76433cc66fff..5c8132873e60 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c @@ -93,7 +93,18 @@ gf100_fb_init(struct nvkm_fb *base) struct gf100_fb *fb = gf100_fb(base); struct nvkm_device *device = fb->base.subdev.device; - if (fb->r100c10_page) + if (!fb->r100c10) { + dma_addr_t addr = dma_map_page(device->dev, fb->r100c10_page, 0, + PAGE_SIZE, DMA_BIDIRECTIONAL); + if (!dma_mapping_er...

...eau/nvkm/subdev/fb/ramgf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c index 53c32fc..c639759 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c @@ -589,7 +589,7 @@ gf100_ram_ctor(const struct nvkm_ram_func *func, struct nvkm_fb *fb, nvkm_debug(subdev, "FBP %d: %4d MiB, %d LTC(s)\n", fbp, size, ltcs); lcomm = min(lcomm, (u64)(size / ltcs) << 20); - total += size << 20; + total += (u64) size << 20; ltcn += ltcs; } else { nvkm_debug(subdev, "FBP %d: disabled\n...