Displaying 20 results from an estimated 32 matches for "nvkm_engine_gr".
2023 Jul 14
2
[PATCH] drm/nouveau/fifo:Fix Nineteen occurrences of the gk104.c error: ERROR: : trailing statements should be on next line
...engine/fifo/gk104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
@@ -137,15 +137,29 @@ gk104_ectx_bind(struct nvkm_engn *engn, struct
nvkm_cctx *cctx, struct nvkm_chan
u64 addr = 0ULL;
switch (engn->engine->subdev.type) {
- case NVKM_ENGINE_SW : return;
- case NVKM_ENGINE_GR : ptr0 = 0x0210; break;
- case NVKM_ENGINE_SEC : ptr0 = 0x0220; break;
- case NVKM_ENGINE_MSPDEC: ptr0 = 0x0250; break;
- case NVKM_ENGINE_MSPPP : ptr0 = 0x0260; break;
- case NVKM_ENGINE_MSVLD : ptr0 = 0x0270; break;
- case NVKM_ENGINE_VIC : ptr0 = 0x0280; break;
- case NV...
2023 Jul 14
1
[PATCH] drm/nouveau/fifo:Fix Nineteen occurrences of the gk104.c error: ERROR: space prohibited before that ':' (ctx:WxW) ERROR: trailing statements should be on next line ERROR: space prohibited before that ':' (ctx:WxW) ERROR: trailing statements should
...engine/fifo/gk104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
@@ -137,15 +137,29 @@ gk104_ectx_bind(struct nvkm_engn *engn, struct
nvkm_cctx *cctx, struct nvkm_chan
u64 addr = 0ULL;
switch (engn->engine->subdev.type) {
- case NVKM_ENGINE_SW : return;
- case NVKM_ENGINE_GR : ptr0 = 0x0210; break;
- case NVKM_ENGINE_SEC : ptr0 = 0x0220; break;
- case NVKM_ENGINE_MSPDEC: ptr0 = 0x0250; break;
- case NVKM_ENGINE_MSPPP : ptr0 = 0x0260; break;
- case NVKM_ENGINE_MSVLD : ptr0 = 0x0270; break;
- case NVKM_ENGINE_VIC : ptr0 = 0x0280; break;
- case NV...
2023 Jul 24
1
[PATCH] drm/nouveau/fifo:Fix Nineteen occurrences of the gk104.c error: ERROR: space prohibited before that ':' (ctx:WxW) ERROR: trailing statements should be on next line ERROR: space prohibited before that ':' (ctx:WxW) ERROR: trailing statements should
...pu/drm/nouveau/nvkm/engine/fifo/gk104.c
> @@ -137,15 +137,29 @@ gk104_ectx_bind(struct nvkm_engn *engn, struct
> nvkm_cctx *cctx, struct nvkm_chan
> u64 addr = 0ULL;
>
> switch (engn->engine->subdev.type) {
> - case NVKM_ENGINE_SW : return;
> - case NVKM_ENGINE_GR : ptr0 = 0x0210; break;
> - case NVKM_ENGINE_SEC : ptr0 = 0x0220; break;
> - case NVKM_ENGINE_MSPDEC: ptr0 = 0x0250; break;
> - case NVKM_ENGINE_MSPPP : ptr0 = 0x0260; break;
> - case NVKM_ENGINE_MSVLD : ptr0 = 0x0270; break;
> - case NVKM_ENGINE_VIC : ptr0 = 0x...
2023 Jul 14
1
[PATCH] drm/nouveau/fifo:Fix Nineteen occurrences of the gk104.c error: ERROR: : trailing statements should be on next line
...pu/drm/nouveau/nvkm/engine/fifo/gk104.c
> @@ -137,15 +137,29 @@ gk104_ectx_bind(struct nvkm_engn *engn, struct
> nvkm_cctx *cctx, struct nvkm_chan
> u64 addr = 0ULL;
>
> switch (engn->engine->subdev.type) {
> - case NVKM_ENGINE_SW : return;
> - case NVKM_ENGINE_GR : ptr0 = 0x0210; break;
> - case NVKM_ENGINE_SEC : ptr0 = 0x0220; break;
> - case NVKM_ENGINE_MSPDEC: ptr0 = 0x0250; break;
> - case NVKM_ENGINE_MSPPP : ptr0 = 0x0260; break;
> - case NVKM_ENGINE_MSVLD : ptr0 = 0x0270; break;
> - case NVKM_ENGINE_VIC : ptr0 = 0x...
2016 Feb 19
0
[PATCH v2 1/4] subdev/iccsense: add new subdev for power sensors
...NGINE_CE0 ] = "ce0",
- [NVKM_ENGINE_CE1 ] = "ce1",
- [NVKM_ENGINE_CE2 ] = "ce2",
- [NVKM_ENGINE_CIPHER ] = "cipher",
- [NVKM_ENGINE_DISP ] = "disp",
- [NVKM_ENGINE_DMAOBJ ] = "dma",
- [NVKM_ENGINE_FIFO ] = "fifo",
- [NVKM_ENGINE_GR ] = "gr",
- [NVKM_ENGINE_IFB ] = "ifb",
- [NVKM_ENGINE_ME ] = "me",
- [NVKM_ENGINE_MPEG ] = "mpeg",
- [NVKM_ENGINE_MSENC ] = "msenc",
- [NVKM_ENGINE_MSPDEC ] = "mspdec",
- [NVKM_ENGINE_MSPPP ] = "msppp",
- [NVKM_EN...
2016 Feb 20
0
[PATCH v4 1/6] subdev/iccsense: add new subdev for power sensors
...NGINE_CE0 ] = "ce0",
- [NVKM_ENGINE_CE1 ] = "ce1",
- [NVKM_ENGINE_CE2 ] = "ce2",
- [NVKM_ENGINE_CIPHER ] = "cipher",
- [NVKM_ENGINE_DISP ] = "disp",
- [NVKM_ENGINE_DMAOBJ ] = "dma",
- [NVKM_ENGINE_FIFO ] = "fifo",
- [NVKM_ENGINE_GR ] = "gr",
- [NVKM_ENGINE_IFB ] = "ifb",
- [NVKM_ENGINE_ME ] = "me",
- [NVKM_ENGINE_MPEG ] = "mpeg",
- [NVKM_ENGINE_MSENC ] = "msenc",
- [NVKM_ENGINE_MSPDEC ] = "mspdec",
- [NVKM_ENGINE_MSPPP ] = "msppp",
- [NVKM_EN...
2016 Feb 17
0
[PATCH 1/2] power sensor support
...NGINE_CE0 ] = "ce0",
- [NVKM_ENGINE_CE1 ] = "ce1",
- [NVKM_ENGINE_CE2 ] = "ce2",
- [NVKM_ENGINE_CIPHER ] = "cipher",
- [NVKM_ENGINE_DISP ] = "disp",
- [NVKM_ENGINE_DMAOBJ ] = "dma",
- [NVKM_ENGINE_FIFO ] = "fifo",
- [NVKM_ENGINE_GR ] = "gr",
- [NVKM_ENGINE_IFB ] = "ifb",
- [NVKM_ENGINE_ME ] = "me",
- [NVKM_ENGINE_MPEG ] = "mpeg",
- [NVKM_ENGINE_MSENC ] = "msenc",
- [NVKM_ENGINE_MSPDEC ] = "mspdec",
- [NVKM_ENGINE_MSPPP ] = "msppp",
- [NVKM_EN...
2016 Feb 17
3
[PATCH 0/2] Support for INA3221 power sensor
The INA3221 is usually found on mid and high end kepler+ gpus
Marins Patch implements the new iccsense subdev and all needed bits for the
INA3221 power sensor.
My Patch implements the hwmon power1 interface to expose the current power
consumption through hwmon (and can be read out via sysfs or the sensors tool)
Please test these patches for Fermi+ GPUs, that nothing gets messed up and
works as
2016 Feb 20
4
[PATCH v3 0/4] Suppor for various power sensors on GF100+
This is a complete rework from the first version I sent out.
Now the implementation is more centered around the power_rails we find in the
SENSE table instead of extdev centered. This makes the implementation a lot
easier and straightforward.
I've added support for the INA219, INA209 and INA3221 sensors found on multiple
Fermi and Kepler cards.
The power consumption is also exported via
2016 Feb 19
4
[PATCH v2 0/4] Suppor for various power sensors on GF100+
This is a complete rework from the last version I sent out.
Now the implementation is more centered around the power_rails we find in the
SENSE table instead of extdev centered. This makes the implementation a lot
easier and straightforward.
I've added support for the INA219, INA209 and INA3221 sensors found on multiple
Fermi and Kepler cards, but only the INA3221 bits are tested so far.
2016 Dec 06
0
[PATCH 3/8] core: add falcon library functions
...NVKM_FALCON_NVDEC] = "NVDEC",
+ [NVKM_FALCON_SEC2] = "SEC2",
+ [NVKM_FALCON_END] = "<invalid>",
+};
+
+static const struct {
+ enum nvkm_devidx devidx;
+ u32 addr;
+} falcon_props[] = {
+ [NVKM_FALCON_PMU] = { NVKM_SUBDEV_PMU, 0x10a000 },
+ [NVKM_FALCON_FECS] = { NVKM_ENGINE_GR, 0x409000 },
+ [NVKM_FALCON_GPCCS] = { NVKM_ENGINE_GR, 0x41a000 },
+ [NVKM_FALCON_NVDEC] = { NVKM_ENGINE_NVDEC, 0x84000 },
+ [NVKM_FALCON_SEC2] = { NVKM_ENGINE_SEC, 0x87000 },
+ [NVKM_FALCON_END] = { NVKM_SUBDEV_NR, 0x0 },
+};
+
+static struct nvkm_falcon *
+nvkm_falcon_find(const struct nvkm_subde...
2016 Feb 24
7
[PATCH v5 0/6] Suppor for various power sensors on GF100+
This is a complete rework from the first version I sent out.
Now the implementation is more centered around the power_rails we find in the
SENSE table instead of extdev centered. This makes the implementation a lot
easier and straightforward.
I've added support for the INA219, INA209 and INA3221 sensors found on multiple
Fermi and Kepler cards.
The power consumption is also exported via
2016 Feb 20
12
[PATCH v4 0/6] Suppor for various power sensors on GF100+
This is a complete rework from the first version I sent out.
Now the implementation is more centered around the power_rails we find in the
SENSE table instead of extdev centered. This makes the implementation a lot
easier and straightforward.
I've added support for the INA219, INA209 and INA3221 sensors found on multiple
Fermi and Kepler cards.
The power consumption is also exported via
2017 Apr 25
6
[PATCH] drm/nouveau: Add support for clockgating on Fermi+
...HERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Lyude Paul
+ */
+#include <core/device.h>
+
+#include "priv.h"
+
+int
+gf100_clkgate_engine(enum nvkm_devidx subdev)
+{
+ switch (subdev) {
+ case NVKM_ENGINE_GR: return 0x00;
+ case NVKM_ENGINE_MSPDEC: return 0x04;
+ case NVKM_ENGINE_MSPPP: return 0x08;
+ case NVKM_ENGINE_MSVLD: return 0x0c;
+ case NVKM_ENGINE_CE0: return 0x10;
+ case NVKM_ENGINE_CE1: return 0x14;
+ case NVKM_ENGINE_MSENC: return 0x18;
+ case NVKM_ENGINE_CE2: return...
2017 Apr 26
1
[PATCH] drm/nouveau: Add support for clockgating on Fermi+
...gt; + * Authors: Lyude Paul
> > + */
> > +#include <core/device.h>
> > +
> > +#include "priv.h"
> > +
> > +int
> > +gf100_clkgate_engine(enum nvkm_devidx subdev)
> > +{
> > + switch (subdev) {
> > + case NVKM_ENGINE_GR: return 0x00;
> > + case NVKM_ENGINE_MSPDEC: return 0x04;
> > + case NVKM_ENGINE_MSPPP: return 0x08;
> > + case NVKM_ENGINE_MSVLD: return 0x0c;
> > + case NVKM_ENGINE_CE0: return 0x10;
> > + ...
2017 Apr 26
0
[PATCH v2] drm/nouveau: Add support for clockgating on Fermi+
...FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Lyude Paul
+ */
+#include <core/device.h>
+
+#include "priv.h"
+
+static inline int
+gf100_clkgate_engine_offset(enum nvkm_devidx subdev)
+{
+ switch (subdev) {
+ case NVKM_ENGINE_GR: return 0x00;
+ case NVKM_ENGINE_MSPDEC: return 0x04;
+ case NVKM_ENGINE_MSPPP: return 0x08;
+ case NVKM_ENGINE_MSVLD: return 0x0c;
+ case NVKM_ENGINE_CE0: return 0x10;
+ case NVKM_ENGINE_CE1: return 0x14;
+ case NVKM_ENGINE_MSENC: return 0x18;
+ case NVKM_ENGINE_CE2: return...
2017 Apr 25
0
[PATCH] drm/nouveau: Add support for clockgating on Fermi+
...gt; + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + * Authors: Lyude Paul
> + */
> +#include <core/device.h>
> +
> +#include "priv.h"
> +
> +int
> +gf100_clkgate_engine(enum nvkm_devidx subdev)
> +{
> + switch (subdev) {
> + case NVKM_ENGINE_GR: return 0x00;
> + case NVKM_ENGINE_MSPDEC: return 0x04;
> + case NVKM_ENGINE_MSPPP: return 0x08;
> + case NVKM_ENGINE_MSVLD: return 0x0c;
> + case NVKM_ENGINE_CE0: return 0x10;
> + case NVKM_ENGINE_CE1:...
2018 Jan 26
1
[RFC v2 1/4] drm/nouveau: Add support for basic clockgating on Kepler1
...n't that be 0x44? Or does nvidia actually set it to that value?
That would be a little odd, because it sets the mode for ENG_PWR from
ON to AUTO and I am sure GPUs boot usually with 0x44.
> +}
> +
> +const struct gk104_clkgate_engine_info gk104_clkgate_engine_info[] = {
> + { NVKM_ENGINE_GR, 0x00 },
> + { NVKM_ENGINE_MSPDEC, 0x04 },
> + { NVKM_ENGINE_MSPPP, 0x08 },
> + { NVKM_ENGINE_MSVLD, 0x0c },
> + { NVKM_ENGINE_CE0, 0x10 },
> + { NVKM_ENGINE_CE1, 0x14 },
> + { NVKM_ENGINE_MSENC, 0x18 },
> + { NVKM_ENGINE_C...
2018 Jan 26
0
[RFC v2 1/4] drm/nouveau: Add support for basic clockgating on Kepler1
...>RUN, ENG_PWR = RUN->AUTO */
+ for (i = 0; order[i].engine != NVKM_SUBDEV_NR; i++) {
+ if (!nvkm_device_subdev(dev, order[i].engine))
+ continue;
+
+ nvkm_mask(dev, 0x20200 + order[i].offset, 0xff, 0x54);
+ }
+}
+
+const struct gk104_clkgate_engine_info gk104_clkgate_engine_info[] = {
+ { NVKM_ENGINE_GR, 0x00 },
+ { NVKM_ENGINE_MSPDEC, 0x04 },
+ { NVKM_ENGINE_MSPPP, 0x08 },
+ { NVKM_ENGINE_MSVLD, 0x0c },
+ { NVKM_ENGINE_CE0, 0x10 },
+ { NVKM_ENGINE_CE1, 0x14 },
+ { NVKM_ENGINE_MSENC, 0x18 },
+ { NVKM_ENGINE_CE2, 0x1c },
+ { NVKM_SUBDEV_NR, 0 },
+};
+
+const struct gf100_idle_filter...
2018 Jan 26
0
[RFC v3 1/4] drm/nouveau: Add support for basic clockgating on Kepler1
...>RUN, ENG_PWR = RUN->AUTO */
+ for (i = 0; order[i].engine != NVKM_SUBDEV_NR; i++) {
+ if (!nvkm_device_subdev(dev, order[i].engine))
+ continue;
+
+ nvkm_mask(dev, 0x20200 + order[i].offset, 0xff, 0x54);
+ }
+}
+
+const struct gk104_clkgate_engine_info gk104_clkgate_engine_info[] = {
+ { NVKM_ENGINE_GR, 0x00 },
+ { NVKM_ENGINE_MSPDEC, 0x04 },
+ { NVKM_ENGINE_MSPPP, 0x08 },
+ { NVKM_ENGINE_MSVLD, 0x0c },
+ { NVKM_ENGINE_CE0, 0x10 },
+ { NVKM_ENGINE_CE1, 0x14 },
+ { NVKM_ENGINE_MSENC, 0x18 },
+ { NVKM_ENGINE_CE2, 0x1c },
+ { NVKM_SUBDEV_NR, 0 },
+};
+
+const struct gf100_idle_filter...