search for: nvkm_bio

...37 insertions(+), 11 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/bios/priv.h b/drm/nouveau/nvkm/subdev/bios/priv.h index e0ec2a6..212800e 100644 --- a/drm/nouveau/nvkm/subdev/bios/priv.h +++ b/drm/nouveau/nvkm/subdev/bios/priv.h @@ -8,7 +8,10 @@ struct nvbios_source { void *(*init)(struct nvkm_bios *, const char *); void (*fini)(void *); u32 (*read)(void *, u32 offset, u32 length, struct nvkm_bios *); + u32 (*size)(void *); bool rw; + bool ignore_checksum; + bool no_pcir; }; int nvbios_extend(struct nvkm_bios *, u32 length); diff --git a/drm/nouveau/nvkm/subdev/bios/shadow.c b...

...> +struct nvbios_power_budget_entry { > + u32 min_w; > + u32 avg_w; > + u32 max_w; > +}; > + > +struct nvbios_power_budget { > + u32 offset; > + u8 hlen; > + u8 elen; > + u8 ecount; > + u8 cap_entry; > +}; > + > +int nvbios_power_budget_header(struct nvkm_bios *, > + struct nvbios_power_budget *); > +int nvbios_power_budget_entry(struct nvkm_bios *, struct nvbios_power_budget *, > + u8 idx, struct nvbios_power_budget_entry *); > + > +#endif > diff --git a/drm/nouveau/nvkm/subde...

...gt; + > + u8 version; > + u8 hlen; > + u8 ecount; > + u8 elen; > +}; > +struct nvbios_thermal_policies_entry { > + u8 mode; > + u16 t0; > + u16 t1; > + u16 t2; > + s16 down_offset; > + s16 up_offset; > +}; > + > +int nvbios_thermal_policies_parse(struct nvkm_bios *, > + struct nvbios_thermal_policies_header *); > +int nvbios_thermal_policies_entry(struct nvkm_bios *, > + struct nvbios_thermal_policies_header *, > + u8 idx, > + struct nvbios_thermal_policies_entry *); > +#endif > diff --git a/drm/nouveau/nvkm/subdev/...

.../nvkm/subdev/bios/priv.h >> b/drm/nouveau/nvkm/subdev/bios/priv.h >> index e0ec2a6..212800e 100644 >> --- a/drm/nouveau/nvkm/subdev/bios/priv.h >> +++ b/drm/nouveau/nvkm/subdev/bios/priv.h >> @@ -8,7 +8,10 @@ struct nvbios_source { >> void *(*init)(struct nvkm_bios *, const char *); >> void (*fini)(void *); >> u32 (*read)(void *, u32 offset, u32 length, struct nvkm_bios *); >> + u32 (*size)(void *); >> bool rw; >> + bool ignore_checksum; >> + bool no_pcir; >> }; >&g...

...ios_power_budget_entry { > + u32 min_w; > + u32 avg_w; > + u32 max_w; > +}; > + > +struct nvbios_power_budget { > + u32 offset; > + u8 header_len; > + u8 entry_len; > + u8 entry_count; > + u8 cap_entry; > +}; > + > +int nvbios_power_budget_header(struct nvkm_bios *, struct nvbios_power_budget *); > +int nvbios_power_budget_entry(struct nvkm_bios *, struct nvbios_power_budget *, > + u8 idx, struct nvbios_power_budget_entry *); > + > +#endif > diff --git a/drm/nouveau/nvkm/subdev/bios/Kbuild b/drm/nouveau/nvkm/subd...

...+}; >>> + >>> +struct nvbios_power_budget { >>> + u32 offset; >>> + u8 hlen; >>> + u8 elen; >>> + u8 ecount; >>> + u8 cap_entry; >>> +}; >>> + >>> +int nvbios_power_budget_header(struct nvkm_bios *, >>> + struct nvbios_power_budget *); >>> +int nvbios_power_budget_entry(struct nvkm_bios *, struct nvbios_power_budget *, >>> + u8 idx, struct nvbios_power_budget_entry *); >>> + >>> +#endif...

This series contains a lot of groundwork to finally fix reclocking issues on Kepler+ gpus. There shouldn't be any functional changes with the first patch being the only exception (fixes some voltage table parsing issues with of few kepler gpus) The most interessting thing is the tool in the last patch, which can be ran alongside the nvidia driver to test nouveaus volting code and print the

...mask; + s16 step; /* PWM mode */ u32 pwm_freq; diff --git a/drm/nouveau/nvkm/subdev/bios/volt.c b/drm/nouveau/nvkm/subdev/bios/volt.c index 81a47b2..77e7b75 100644 --- a/drm/nouveau/nvkm/subdev/bios/volt.c +++ b/drm/nouveau/nvkm/subdev/bios/volt.c @@ -73,40 +73,45 @@ nvbios_volt_parse(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len, memset(info, 0x00, sizeof(*info)); switch (!!volt * *ver) { case 0x12: - info->type = NVBIOS_VOLT_GPIO; - info->vidmask = nvbios_rd08(bios, volt + 0x04); + info->type = NVBIOS_VOLT_GPIO; + info->vidmask = nvbios_rd08(bi...

There is an optinal header field in the power budget table we can use to read out the power cap of the GPU. We should have this in the kernel before actually using it to catch errors and see how reliable this is, but as it seems it works on all GPUs as expected on Kepler und Maxwells with the power cap field set in the vbios. This series keeps things really simple for now until we figure out

There is an optinal header field in the power budget table we can use to read out the power cap of the GPU. We should have this in the kernel before actually using it to catch errors and see how reliable this is, but as it seems it works on all GPUs as expected on Kepler und Maxwells with the power cap field set in the vbios. This series keeps things really simple for now until we figure out

..._THERMAL_POLICIES_H__ + +struct nvbios_thermal_policies_header { + u32 offset; + + u8 version; + u8 hlen; + u8 ecount; + u8 elen; +}; +struct nvbios_thermal_policies_entry { + u8 mode; + u16 t0; + u16 t1; + u16 t2; + s16 down_offset; + s16 up_offset; +}; + +int nvbios_thermal_policies_parse(struct nvkm_bios *, + struct nvbios_thermal_policies_header *); +int nvbios_thermal_policies_entry(struct nvkm_bios *, + struct nvbios_thermal_policies_header *, + u8 idx, + struct nvbios_thermal_policies_entry *); +#endif diff --git a/drm/nouveau/nvkm/subdev/bios/Kbuild b/drm/nouveau/nvkm/subd...

Adds reclocking for NVA0, and a whole lot of work for other cards. Had these patches collecting dust for a little, but tested them with both my NVA0, and Martin's a while back. Success not guaranteed, but should be quite a leap forward. Happy reviewing and testing. Cheers, Roy

...rf.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/perf.h index 478b1c0..28555d6 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/perf.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/perf.h @@ -40,4 +40,5 @@ struct nvbios_perf_fan { }; int nvbios_perf_fan_parse(struct nvkm_bios *, struct nvbios_perf_fan *); +u16 nvbios_perf_script_unk1c(struct nvkm_bios *bios); #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c index c306835..55c1f36 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c +++ b/driv...

...rf.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/perf.h index 478b1c0..28555d6 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/perf.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/perf.h @@ -40,4 +40,5 @@ struct nvbios_perf_fan { }; int nvbios_perf_fan_parse(struct nvkm_bios *, struct nvbios_perf_fan *); +u16 nvbios_perf_script_unk1c(struct nvkm_bios *bios); #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c index c306835..55c1f36 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.c +++ b/driv...

...CK_H__ +#define __NVBIOS_BASECLOCK_H__ +struct nvbios_baseclk_header { + u16 offset; + + u8 version; + u8 hlen; + u8 ecount; + u8 elen; + u8 scount; + u8 slen; + + u8 base; + u8 boost; + u8 tdp; +}; +struct nvbios_baseclk_entry { + u8 pstate; + u16 clock_mhz; +}; +int nvbios_baseclock_parse(struct nvkm_bios *, struct nvbios_baseclk_header *); +int nvbios_baseclock_entry(struct nvkm_bios *, struct nvbios_baseclk_header *, + u8 idx, struct nvbios_baseclk_entry *); +#endif diff --git a/drm/nouveau/nvkm/subdev/bios/Kbuild b/drm/nouveau/nvkm/subdev/bios/Kbuild index dbcb0ef..6cb3beb 100644 --- a/drm/...

This series fixes most of the issues regarding volting on GPUs with any form of GPU Boost inside their vbios, which is mainly Kepler and newer, but we find some boosting related tables in Fermi vbios' already In the end reclocking should work on most Kepler cards without any issues Karol Herbst (19): bios/volt: handle voltage table version 0x50 with 0ed header volt: properly detect entry

..._POWER_BUDGET_H__ + +#include <nvkm/subdev/bios.h> + +struct nvbios_power_budget_entry { + u32 min_w; + u32 avg_w; + u32 max_w; +}; + +struct nvbios_power_budget { + u32 offset; + u8 header_len; + u8 entry_len; + u8 entry_count; + u8 cap_entry; +}; + +int nvbios_power_budget_header(struct nvkm_bios *, struct nvbios_power_budget *); +int nvbios_power_budget_entry(struct nvkm_bios *, struct nvbios_power_budget *, + u8 idx, struct nvbios_power_budget_entry *); + +#endif diff --git a/drm/nouveau/nvkm/subdev/bios/Kbuild b/drm/nouveau/nvkm/subdev/bios/Kbuild index be57...

...#define __NVBIOS_POWER_BUDGET_H__ + +#include <nvkm/subdev/bios.h> + +struct nvbios_power_budget_entry { + u32 min_w; + u32 avg_w; + u32 max_w; +}; + +struct nvbios_power_budget { + u32 offset; + u8 hlen; + u8 elen; + u8 ecount; + u8 cap_entry; +}; + +int nvbios_power_budget_header(struct nvkm_bios *, + struct nvbios_power_budget *); +int nvbios_power_budget_entry(struct nvkm_bios *, struct nvbios_power_budget *, + u8 idx, struct nvbios_power_budget_entry *); + +#endif diff --git a/drm/nouveau/nvkm/subdev/bios/Kbuild b/drm/nouveau/nv...

On a very few GPUs with the voltage table version 0x50 we have to read out the VIDs out of the entries of the table, where all the other gpus are either PWM based or get a base and a step voltage out of the table header. Currently nouveau tried to autodetect this and actually doesn't parse the entries. This Series adds two things: 1. It parses the entries 2. It decides upon a field in the

With these both patches, most of the kepler cards should be able to reclock their core clock without issues. These patches should be tested carefully among nouveau devs, so that these don't break reclocking on other cards (especially Teslas). Particularly the second one might break reclocking here and there. Karol Herbst (2): bios/volt: handle voltage table version 0x50 with 0ed header