search for: nvf0

...COPY2 ] = &nve0_copy2_oclass; -#if 0 device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; -#endif device->oclass[NVDEV_ENGINE_PERFMON] = &nvf0_perfmon_oclass; break; case 0xf1: @@ -236,11 +234,9 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass; device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass; device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_c...

https://bugs.freedesktop.org/show_bug.cgi?id=70326 Priority: medium Bug ID: 70326 Assignee: nouveau at lists.freedesktop.org Summary: [NVF0] Kernel/Driver fails to initialize acceleration on GTX Titan QA Contact: xorg-team at lists.x.org Severity: normal Classification: Unclassified OS: Linux (All) Reporter: bobahu4 at gmail.com Hardware: x86-64 (AMD64)...

...RM does the job and automatically downclocks the GPU when specific temperatures thresholds are hit. Lucky for us the needed bits are already configured through a script inside the vbios at POST time and we only need to verify the set bits. This Patch implements the verification steps for all [nvc0,nvf0) cards by printing a debug message and in the case we detect a wrongly configured fsrm we also print an error. Sadly on nvf0 and newer cards this looks a bit different and a other patch for cards older than nvc0 will follow the next days. Signed-off-by: Karol Herbst <nouveau at karolherbst.de&...

...gk104 >> -o $@ > > > This is unrelated to your main change, but well should be *exactly* the same > thing. :) You mean the bit about me adding -V gf100? Figured I'd fix it up while I was at it. The machine/variant names changed though. > > >> >> $(filter %nvf0.vpc,$(SHADERS)): %.vpc: %.vp >> cpp -DENVYAS $< | sed -e '/^#/d' | $(ENVYAS) -w -m gk110 -o $@ >> $(filter %nvf0.fpc,$(SHADERS)): %.fpc: %.fp >> cpp -DENVYAS $< | sed -e '/^#/d' | $(ENVYAS) -w -m gk110 -o $@ >> + >> +$(filter %nv1...

Hi folks, This set of patches is just for clearing the way before introducing the infrastructure for performance counters in perfmon. I'll try to publish a new version of my kernel interface based on nvif in a couple of days. See you.

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- I decided to let the user still specify config=BLA=1 to override the hw disable in case we get something wrong or for double-checking stuff, but I suspect it won't really be used much. I'm not terribly fond of the message text, if you come up with something better, feel free to drop it in.

.../engine/disp/nv50.o @@ -213,20 +213,20 @@ nouveau-y += core/engine/disp/nv84.o nouveau-y += core/engine/disp/nv94.o nouveau-y += core/engine/disp/nva0.o nouveau-y += core/engine/disp/nva3.o -nouveau-y += core/engine/disp/nvd0.o -nouveau-y += core/engine/disp/nve0.o -nouveau-y += core/engine/disp/nvf0.o +nouveau-$(CONFIG_DRM_NOUVEAU_NVC0) += core/engine/disp/nvd0.o +nouveau-$(CONFIG_DRM_NOUVEAU_NVC0) += core/engine/disp/nve0.o +nouveau-$(CONFIG_DRM_NOUVEAU_NVC0) += core/engine/disp/nvf0.o nouveau-y += core/engine/disp/dacnv50.o nouveau-y += core/engine/disp/dport.o nouveau-y += core/engine/di...

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 This release adds NVF0 support along with XV speedups, and reverse optimus fixes for use with new X server. Ben Skeggs (1): nvf0: implement EXA and XVideo acceleration Dave Airlie (4): drmmode: add support for multi-screen reverse optimus fix make distcheck. nouveau: fix crash when xinerama is e...

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 This release adds NVF0 support along with XV speedups, and reverse optimus fixes for use with new X server. Ben Skeggs (1): nvf0: implement EXA and XVideo acceleration Dave Airlie (4): drmmode: add support for multi-screen reverse optimus fix make distcheck. nouveau: fix crash when xinerama is e...

...+213,20 @@ nouveau-y += core/engine/disp/nv84.o > nouveau-y += core/engine/disp/nv94.o > nouveau-y += core/engine/disp/nva0.o > nouveau-y += core/engine/disp/nva3.o > -nouveau-y += core/engine/disp/nvd0.o > -nouveau-y += core/engine/disp/nve0.o > -nouveau-y += core/engine/disp/nvf0.o > +nouveau-$(CONFIG_DRM_NOUVEAU_NVC0) += core/engine/disp/nvd0.o > +nouveau-$(CONFIG_DRM_NOUVEAU_NVC0) += core/engine/disp/nve0.o > +nouveau-$(CONFIG_DRM_NOUVEAU_NVC0) += core/engine/disp/nvf0.o > nouveau-y += core/engine/disp/dacnv50.o > nouveau-y += core/engine/disp/dport.o &gt...

...SIGNED MESSAGE----- Hash: SHA1 New nouveau DDX release. Ben Skeggs (1): Bump version to 1.0.12 Ilia Mirkin (14): copy: don't bother trying to create copy on pre-nva3 allow path to envyas binary to be specified kepler: remove unnecessary texbars, add live-only tex for nvf0 use defined method names where available nv50: explicitly disable ZETA buffer Check before trying a solid fill nv04-nv40: don't attempt to do 32-bit shifts older hardware prefers copy to clear, so use that nv50/exa: add comments showing the code that makes up...

...SIGNED MESSAGE----- Hash: SHA1 New nouveau DDX release. Ben Skeggs (1): Bump version to 1.0.12 Ilia Mirkin (14): copy: don't bother trying to create copy on pre-nva3 allow path to envyas binary to be specified kepler: remove unnecessary texbars, add live-only tex for nvf0 use defined method names where available nv50: explicitly disable ZETA buffer Check before trying a solid fill nv04-nv40: don't attempt to do 32-bit shifts older hardware prefers copy to clear, so use that nv50/exa: add comments showing the code that makes up...

...-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/shader/Makefile | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/src/shader/Makefile b/src/shader/Makefile index 46658e9..2d789be 100644 --- a/src/shader/Makefile +++ b/src/shader/Makefile @@ -24,20 +24,21 @@ NVF0_SHADERS = xfrm2nvf0.vpc \ videonvf0.fpc SHADERS = $(NVC0_SHADERS) $(NVE0_SHADERS) $(NVF0_SHADERS) +ENVYAS ?= envyas all: $(SHADERS) $(filter %nvc0.vpc,$(SHADERS)): %.vpc: %.vp - cpp -DENVYAS $< | sed -e '/^#/d' | envyas -w -m nvc0 -o $@ + cpp -DENVYAS $< | sed -e ...

https://bugs.freedesktop.org/show_bug.cgi?id=69768 Priority: medium Bug ID: 69768 Assignee: nouveau at lists.freedesktop.org Summary: not able to do a suspend QA Contact: xorg-team at lists.x.org Severity: normal Classification: Unclassified OS: All Reporter: marccollin7379 at gmail.com Hardware:

....o -nouveau-y += core/engine/disp/nv50.o -nouveau-y += core/engine/disp/nv84.o -nouveau-y += core/engine/disp/nv94.o -nouveau-y += core/engine/disp/nva0.o -nouveau-y += core/engine/disp/nva3.o -nouveau-y += core/engine/disp/nvd0.o -nouveau-y += core/engine/disp/nve0.o -nouveau-y += core/engine/disp/nvf0.o -nouveau-y += core/engine/disp/dacnv50.o -nouveau-y += core/engine/disp/dport.o -nouveau-y += core/engine/disp/hdanva3.o -nouveau-y += core/engine/disp/hdanvd0.o -nouveau-y += core/engine/disp/hdminv84.o -nouveau-y += core/engine/disp/hdminva3.o -nouveau-y += core/engine/disp/hdminvd0.o -nouveau-...

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Ben Skeggs (5): nve0: explicitly ask kernel for copy2 object nvf0: recognise as supported chipset nvc0-nve0: split shader code from their headers nvc0-nve0: decompile shaders into their source, add basic build system nve0: envyas isn't overly clever.. avoid short-form instructions Dave Airlie (2): nouveau: attempt to fix zaphod since...

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Ben Skeggs (5): nve0: explicitly ask kernel for copy2 object nvf0: recognise as supported chipset nvc0-nve0: split shader code from their headers nvc0-nve0: decompile shaders into their source, add basic build system nve0: envyas isn't overly clever.. avoid short-form instructions Dave Airlie (2): nouveau: attempt to fix zaphod since...

...ouveau DDX release. > > Ben Skeggs (1): > Bump version to 1.0.12 > > Ilia Mirkin (14): > copy: don't bother trying to create copy on pre-nva3 > allow path to envyas binary to be specified > kepler: remove unnecessary texbars, add live-only tex for nvf0 > use defined method names where available > nv50: explicitly disable ZETA buffer > Check before trying a solid fill > nv04-nv40: don't attempt to do 32-bit shifts > older hardware prefers copy to clear, so use that > nv50/exa: add comments...

...src/shader/xfrm2nv110.vp create mode 100644 src/shader/xfrm2nv110.vpc diff --git a/src/Makefile.am b/src/Makefile.am index 1e04ddf..6ba8d87 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -77,48 +77,64 @@ EXTRA_DIST = hwdefs/nv_3ddefs.xml.h \ shader/exac8nve0.fpc \ shader/exac8nvf0.fp \ shader/exac8nvf0.fpc \ + shader/exac8nv110.fp \ + shader/exac8nv110.fpc \ shader/exacanvc0.fp \ shader/exacanvc0.fpc \ shader/exacanve0.fp \ shader/exacanve0.fpc \ shader/exacanvf0.fp \ shader/exacanvf0.fpc \ + shader/exacanv110.f...

...uveau/Makefile +++ b/drivers/gpu/drm/nouveau/Makefile @@ -270,6 +270,7 @@ nouveau-y += core/engine/graph/nvc8.o nouveau-y += core/engine/graph/nvd7.o nouveau-y += core/engine/graph/nvd9.o nouveau-y += core/engine/graph/nve4.o +nouveau-y += core/engine/graph/nvea.o nouveau-y += core/engine/graph/nvf0.o nouveau-y += core/engine/graph/nv108.o nouveau-y += core/engine/mpeg/nv31.o diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c index e2de73ee5eee..3904073f860d 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c ++...