Displaying 20 results from an estimated 39 matches for "nvdev_subdev_bar".
2014 Feb 04
1
[RFC 07/16] drm/nouveau/bar/nvc0: support chips without BAR3
...new(device, 0, nv_device_resource_len(device, 3), 0, &vm);
> + bar_len = nv_device_resource_len(device, bar);
> +
> + ret = nouveau_vm_new(device, 0, bar_len, 0, &vm);
> if (ret)
> return ret;
>
> atomic_inc(&vm->engref[NVDEV_SUBDEV_BAR]);
>
> - ret = nouveau_gpuobj_new(nv_object(priv), NULL,
> - (nv_device_resource_len(device, 3) >> 12) * 8,
> - 0x1000, NVOBJ_FLAG_ZERO_ALLOC,
> - &vm->pgt[0].obj[0]);
>...
2014 Jun 27
5
[PATCH 1/2] drm/nouveau/bar: add noncached ioremap property
Some BARs (like GK20A's) do not support being ioremapped write-combined.
Add a boolean property to the BAR structure and handle that case in the
Nouveau BO implementation.
Signed-off-by: Alexandre Courbot <acourbot at nvidia.com>
---
drivers/gpu/drm/nouveau/core/include/subdev/bar.h | 3 +++
drivers/gpu/drm/nouveau/nouveau_bo.c | 17 ++++++++++++-----
2 files changed, 15
2012 Aug 19
1
[PATCH 06/10] drm/nouveau: sparse fixes
...se.c
index d4abca7..afc6be0 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/device/base.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/device/base.c
@@ -70,7 +70,6 @@ static const u64 disable_map[] = {
[NVDEV_SUBDEV_VM] = NV_DEVICE_DISABLE_CORE,
[NVDEV_SUBDEV_INSTMEM] = NV_DEVICE_DISABLE_CORE,
[NVDEV_SUBDEV_BAR] = NV_DEVICE_DISABLE_CORE,
- [NVDEV_SUBDEV_GPIO] = NV_DEVICE_DISABLE_CORE,
[NVDEV_SUBDEV_VOLT] = NV_DEVICE_DISABLE_CORE,
[NVDEV_SUBDEV_FAN0] = NV_DEVICE_DISABLE_CORE,
[NVDEV_SUBDEV_CLOCK] = NV_DEVICE_DISABLE_CORE,
--
1.7.8.6
2014 Mar 24
0
[PATCH 04/12] drm/nouveau/bar/nvc0: support chips without BAR3
...priv->bar[nr].pgd);
if (ret)
return ret;
- ret = nouveau_vm_new(device, 0, nv_device_resource_len(device, 3), 0, &vm);
+ bar_len = nv_device_resource_len(device, bar);
+
+ ret = nouveau_vm_new(device, 0, bar_len, 0, &vm);
if (ret)
return ret;
atomic_inc(&vm->engref[NVDEV_SUBDEV_BAR]);
- ret = nouveau_gpuobj_new(nv_object(priv), NULL,
- (nv_device_resource_len(device, 3) >> 12) * 8,
- 0x1000, NVOBJ_FLAG_ZERO_ALLOC,
- &vm->pgt[0].obj[0]);
- vm->pgt[0].refcount[0] = 1;
- if (ret)
- return ret;
+ /*
+ * Bootstrap page table lookup.
+ */
+ if (bar...
2014 Jun 28
1
[PATCH v2] drm/gk20a: add BAR instance
..._IBUS ] =
>>>&gk20a_ibus_oclass;
>>> device->oclass[NVDEV_SUBDEV_INSTMEM] =
>>>nv50_instmem_oclass;
>>> device->oclass[NVDEV_SUBDEV_VM ] =
>>>&nvc0_vmmgr_oclass;
>>>- device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
>>>+ device->oclass[NVDEV_SUBDEV_BAR ] = &gk20a_bar_oclass;
>>> device->oclass[NVDEV_ENGINE_DMAOBJ ] =
>>>&nvd0_dmaeng_oclass;
>>> device->oclass[NVDEV_ENGINE_FIFO ] =
>...
2014 Feb 01
0
[RFC 07/16] drm/nouveau/bar/nvc0: support chips without BAR3
...priv->bar[nr].pgd);
if (ret)
return ret;
- ret = nouveau_vm_new(device, 0, nv_device_resource_len(device, 3), 0, &vm);
+ bar_len = nv_device_resource_len(device, bar);
+
+ ret = nouveau_vm_new(device, 0, bar_len, 0, &vm);
if (ret)
return ret;
atomic_inc(&vm->engref[NVDEV_SUBDEV_BAR]);
- ret = nouveau_gpuobj_new(nv_object(priv), NULL,
- (nv_device_resource_len(device, 3) >> 12) * 8,
- 0x1000, NVOBJ_FLAG_ZERO_ALLOC,
- &vm->pgt[0].obj[0]);
- vm->pgt[0].refcount[0] = 1;
- if (ret)
- return ret;
+ /*
+ * Bootstrap page table lookup.
+ */
+ if (bar...
2014 Jun 27
0
[PATCH 2/2] drm/gk20a: add BAR instance
...ce/nve0.c
@@ -165,7 +165,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_IBUS ] = &gk20a_ibus_oclass;
device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
- device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
+ device->oclass[NVDEV_SUBDEV_BAR ] = &gk20a_bar_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;
device->oclass[NVDEV_ENGINE_FIFO ] = gk20a_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass;...
2014 Jun 28
0
[PATCH v2] drm/gk20a: add BAR instance
...gt; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk20a_ibus_oclass;
>> device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
>> device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
>>- device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
>>+ device->oclass[NVDEV_SUBDEV_BAR ] = &gk20a_bar_oclass;
>> device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;
>> device->oclass[NVDEV_ENGINE_FIFO ] = gk20a_fifo_oclass;
>>...
2014 Dec 23
1
[PATCH nouveau 08/11] instmem: add dummy support for GK20A
...ass;
> - device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
> + device->oclass[NVDEV_SUBDEV_INSTMEM] = gk20a_instmem_oclass;
> device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
> device->oclass[NVDEV_SUBDEV_BAR ] = &gk20a_bar_oclass;
> device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
> diff --git a/nvkm/include/subdev/instmem.h b/nvkm/include/subdev/instmem.h
> index c1df26f3230c..6264660bedce 100644
> --- a/nvkm/include/subdev/instmem.h
> +++ b/nvkm/inc...
2014 Mar 24
0
[PATCH 12/12] drm/nouveau: support for probing GK20A
...timer_oclass;
+ device->oclass[NVDEV_SUBDEV_FB ] = nvea_fb_oclass;
+ device->oclass[NVDEV_SUBDEV_IBUS ] = &nvea_ibus_oclass;
+ device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
+ device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
+ device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
+ device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;
+ device->oclass[NVDEV_ENGINE_FIFO ] = nvea_fifo_oclass;
+ /* TODO will need an implementation for this at some point... */
+#if 0
+ device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_o...
2014 Dec 03
0
[PATCH] Add support for GK208B, resolves bug 86935
...fb_oclass;
+ device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
+ device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass;
+ device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
+ device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
+ device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
+ device->oclass[NVDEV_SUBDEV_PWR ] = nv108_pwr_oclass;
+ device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
+ device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
+ device->oclass[NVDEV_ENGINE_FIFO ] = nv108_fifo_oclass;
+ devi...
2015 Feb 21
0
[PATCH] device/gm100: Basic GM206 bring up (as copy of GM204)
...fb_oclass;
+ device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass;
+ device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
+ device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
+ device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
+ device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
+ device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
+#if 0
+ device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
+#endif
+ device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
+#if 0
+ device->oclass[NVDEV_ENGINE_FIFO ] = gk...
2014 May 12
1
[PATCH 1/2] device/nvf1: add support for 0xf1 (gk110b)
...b_oclass;
+ device->oclass[NVDEV_SUBDEV_LTCG ] = gf100_ltcg_oclass;
+ device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass;
+ device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
+ device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
+ device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
+ device->oclass[NVDEV_SUBDEV_PWR ] = &nvd0_pwr_oclass;
+ device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
+ device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;
+ device->oclass[NVDEV_ENGINE_FIFO ] = nve0_fifo_oclass;
+...
2014 Mar 26
1
[PATCH 12/12] drm/nouveau: support for probing GK20A
...ss;
> + device->oclass[NVDEV_SUBDEV_IBUS ] = &nvea_ibus_oclass;
> + device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
> + device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
> + device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
> + device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;
> + device->oclass[NVDEV_ENGINE_FIFO ] = nvea_fifo_oclass;
> + /* TODO will need an implementation for this at some point... */
> +#if 0
&g...
2014 Dec 23
0
[PATCH nouveau 08/11] instmem: add dummy support for GK20A
...oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gk20a_ibus_oclass;
- device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
+ device->oclass[NVDEV_SUBDEV_INSTMEM] = gk20a_instmem_oclass;
device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
device->oclass[NVDEV_SUBDEV_BAR ] = &gk20a_bar_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
diff --git a/nvkm/include/subdev/instmem.h b/nvkm/include/subdev/instmem.h
index c1df26f3230c..6264660bedce 100644
--- a/nvkm/include/subdev/instmem.h
+++ b/nvkm/include/subdev/instmem.h
@@ -48,5 +48,6 @...
2013 Jul 29
0
[PATCH] drm/nouveau/vdec: copy nvc0 bsp/vp/ppp to nv98
...nv50.c
index 07dd1fe..a4aa81a 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/vm/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/vm/nv50.c
@@ -174,6 +174,7 @@ nv50_vm_flush(struct nouveau_vm *vm)
case NVDEV_ENGINE_GR : vme = 0x00; break;
case NVDEV_ENGINE_VP : vme = 0x01; break;
case NVDEV_SUBDEV_BAR : vme = 0x06; break;
+ case NVDEV_ENGINE_PPP :
case NVDEV_ENGINE_MPEG : vme = 0x08; break;
case NVDEV_ENGINE_BSP : vme = 0x09; break;
case NVDEV_ENGINE_CRYPT: vme = 0x0a; break;
--
1.8.1.5
2015 Feb 11
0
[PATCH v2 2/6] instmem/gk20a: move memory allocation to instmem
..._oclass;
device->oclass[NVDEV_SUBDEV_IBUS ] = &gk20a_ibus_oclass;
- device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
+ device->oclass[NVDEV_SUBDEV_INSTMEM] = gk20a_instmem_oclass;
device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
device->oclass[NVDEV_SUBDEV_BAR ] = &gk20a_bar_oclass;
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
diff --git a/drm/nouveau/nvkm/subdev/fb/ramgk20a.c b/drm/nouveau/nvkm/subdev/fb/ramgk20a.c
index 5f30db1..60d8e1c 100644
--- a/drm/nouveau/nvkm/subdev/fb/ramgk20a.c
+++ b/drm/nouveau/nvkm/subdev/fb/ramg...
2014 May 02
10
[PATCH v4 0/9] drm/nouveau: support for GK20A, cont'd
Latest patches for GK20A, taking comments received for v3 into account.
Changes since v3:
- use only pfn_to_page() and page_to_pfn() in GK20A's FB. These functions
are present on every arch and the physical address to page frame number
conversion is also consistently a shift of PAGE_SHIFT. This part will
probably be replaced by something nicer in the future anyway.
- fixed a warning on
2014 Apr 21
13
[PATCH v2 00/10] drm/nouveau: support for GK20A, cont'd
Hi everyone,
Way overdue v2 of the final patches that enable basic GK20A support. Hopefully
all the issues raised with v1 have been addressed.
Changes since v1:
- Use gk20a clock driver by Ben instead of twiddling nv04's
- Name new classes after gk20a instead of nvea
- Addressed comments about BAR initialization code factorization
- Removed non-essential code which only purpose was to avoid
2015 Apr 16
2
[PATCH 6/6] mmu: gk20a: implement IOMMU mapping for big pages
...ss;
> device->oclass[NVDEV_SUBDEV_INSTMEM] = gk20a_instmem_oclass;
> - device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
> + device->oclass[NVDEV_SUBDEV_MMU ] = &gk20a_mmu_oclass;
> device->oclass[NVDEV_SUBDEV_BAR ] = &gk20a_bar_oclass;
> device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
> device->oclass[NVDEV_ENGINE_FIFO ] = gk20a_fifo_oclass;
> diff --git a/drm/nouveau/nvkm/subdev/mmu/Kbuild b/drm/nouveau/nvkm/subdev/mmu/Kbuild
> index...