search for: nvdec

...void *scrub_image; 54 struct fw_bin_header *hsbin_hdr; 55 struct hsf_fw_header *fw_hdr; 56 struct hsf_load_header *lhdr; 57 void *scrub_data; 58 int ret; 59 60 nvkm_debug(subdev, "running VPR scrubber binary on NVDEC...\n"); 61 62 if (!(engine = nvkm_engine_ref(&device->nvdec->engine))) 63 return PTR_ERR(engine); This code doesn't make sense. nvkm_engine_ref() isn't going to return NULL because we're not passing a NULL to it. I guess we shoul...

...b/drm/nouveau/nvkm/subdev/secboot/gp102.c index 8570c84c8a29..f3b3c66349d2 100644 --- a/drm/nouveau/nvkm/subdev/secboot/gp102.c +++ b/drm/nouveau/nvkm/subdev/secboot/gp102.c @@ -59,7 +59,8 @@ gp102_run_secure_scrub(struct nvkm_secboot *sb) nvkm_debug(subdev, "running VPR scrubber binary on NVDEC...\n"); - if (!(engine = nvkm_engine_ref(&device->nvdec->engine))) + engine = nvkm_engine_ref(&device->nvdec->engine); + if (IS_ERR(engine)) return PTR_ERR(engine); falcon = device->nvdec->falcon; -- 2.12.0

So now I'm to looking to implement NVDec and as far as I know the game submits a series of commands to the service. This commands are processed by Falcon and then it does its magic. Do you guys got any RE on Falcon commands and how they execute different workloads ? -------------- next part -------------- An HTML attachment was scrubbed.....

...gp104/gr/gpccs_inst.bin nvidia/gp104/gr/gpccs_data.bin nvidia/gp104/gr/gpccs_sig.bin nvidia/gp104/sec2/image.bin nvidia/gp104/sec2/desc.bin nvidia/gp104/sec2/sig.bin nvidia/gp104/acr/ucode_load.bin nvidia/gp104/acr/ucode_unload.bin nvidia/gp104/acr/bl.bin nvidia/gp104/acr/unload_bl.bin nvidia/gp104/nvdec/scrubber.bin" > > Bisecting is kinda painful with miscompilation and init/main.c breakage. > > > > BTW do I need all those megabytes of firmware? > > > > [ 0.923273] fb0: switching to nouveaufb from EFI VGA > > [ 0.923440] nouveau 0000:02:00.0: NVIDIA...

...is problem. In order to offload video decoding to the NVidia TU117 GPU, it seems the scrubber > > firmware must be available, but as far as I know,that has not been released by NVidia. To get it to work, I followed > > what ubuntu have done and the scrubber in /lib/firmware/nvidia/tu117/nvdec/ is a symlink to > > ../../tu116/nvdev/scrubber.bin. That, of course, means that some of the firmware loaded is for a different card is being > > loaded. I note that processing related to firmware is being changed in the patch. Might my set up be at the root of my > > problem? &gt...

...m/subdev/top/gk104.c b/drivers/gpu/drm/nouveau/nvkm/subdev/top/gk104.c index e01746ce9fc4..1156634533f9 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/top/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/top/gk104.c @@ -90,7 +90,6 @@ gk104_top_oneinit(struct nvkm_top *top) case 0x00000010: B_(NVDEC ); break; case 0x00000013: B_(CE ); break; case 0x00000014: C_(GSP ); break; - break; default: break; } diff --git a/drivers/gpu/drm/qxl/qxl_ioctl.c b/drivers/gpu/drm/qxl/qxl_ioctl.c index 5cea6eea72ab..2072ddc9549c 100644 --- a/drivers/gpu/drm/qxl/qxl_ioctl.c +++ b/drivers/g...

gp104 refuses to switch to "graphic" mode and show anything past this line: fb0: switching to nouveaufb from EFI VGA Machine is fine, as it I can press Ctrl+Alt+Delete and reboot it normally. 5.5 is OK. 5.6 is broken. Bisecting is kinda painful with miscompilation and init/main.c breakage. BTW do I need all those megabytes of firmware? [ 0.923273] fb0: switching to nouveaufb

...re. It's just that the dang nvidia is pretty much sitting there on its hiney doing nothing (the mediaserver is running headless), while the CPU block is doing all the heavy lifting (I'm running torznab grabbers, DLNA streaming etc off an old laptop whose screen's busted). I tried nvenc/nvdec, but the 650M doesn't seem to support it according to my reading of the support page <https://developer.nvidia.com/video-encode-decode-gpu-support-matrix> Doesn't support CUDA either, it seems. so I switched the hardware transcoding to vaapi on the intel gpu. I figure if the nvidia t...

...nvkm/engine/msenc.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/mspdec.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/msppp.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/msvld.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/nvdec.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/nvenc.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/pm.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/sec.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/sec2.h...

...GPL-2.0 */ include/nvkm/engine/msenc.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/mspdec.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/msppp.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/msvld.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/nvdec.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/nvenc.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/pm.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/sec.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/sec2.h:/* SPDX-License-Identifier: GPL-2.0...

Hi, If I am reading the featurematrix <https://nouveau.freedesktop.org/wiki/FeatureMatrix/> right, VAAPI is supported for nouveau on the GeForce650M (my card). Here is the output of inxi -F System: Host: MediaServer Kernel: 5.4.0-42-generic x86_64 bits: 64 Console: tty 1 Distro: Ubuntu 18.04.5 LTS Machine: Device: laptop System: SAMSUNG product: 300E4C/300E5C/300E7C v: 0.1 serial:

https://bugs.freedesktop.org/show_bug.cgi?id=100567 Bug ID: 100567 Summary: Nouveau system freeze fifo: SCHED_ERROR 0a [CTXSW_TIMEOUT] Product: xorg Version: unspecified Hardware: Other OS: All Status: NEW Severity: normal Priority: medium Component: Driver/nouveau

...m/nouveau/include/nvkm/engine/falcon.h +++ b/drm/nouveau/include/nvkm/engine/falcon.h @@ -4,13 +4,39 @@ #include <core/engine.h> struct nvkm_fifo_chan; +enum nvkm_falconidx { + NVKM_FALCON_PMU = 0, + NVKM_FALCON_RESERVED = 1, + NVKM_FALCON_FECS = 2, + NVKM_FALCON_GPCCS = 3, + NVKM_FALCON_NVDEC = 4, + NVKM_FALCON_SEC2 = 7, + NVKM_FALCON_END = 11, + NVKM_FALCON_INVALID = 0xffffffff, +}; + +enum nvkm_falcon_dmaidx { + FALCON_DMAIDX_UCODE = 0, + FALCON_DMAIDX_VIRT = 1, + FALCON_DMAIDX_PHYS_VID = 2, + FALCON_DMAIDX_PHYS_SYS_COH = 3, + FALCON_DMAIDX_PHYS_SYS_NCOH = 4, +}; + +extern const c...

From: Jérôme Glisse <jglisse at redhat.com> (mm is cced just to allow exposure of device driver work without ccing a long list of peoples. I do not think there is anything usefull to discuss from mm point of view but i might be wrong, so just for the curious :)). git://people.freedesktop.org/~glisse/linux branch: nouveau-hmm-v00

This was the first step of the secure boot refactoring - as Ben asked for some fixes, I now submit it as its own series to make it easier to review (and also because rebasing secure boot on top of this takes time and I don't want to do it until this is validated!). This series attempts to factorize the duplicate falcon-related code into a single library, using the existing nvkm_falcon

...746ce9fc4..1156634533f9 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/top/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/top/gk104.c @@ -88,11 +88,10 @@ gk104_top_oneinit(struct nvkm_top *top) case 0x0000000e: B_(NVENC ); break; case 0x0000000f: A_(NVENC1); break; case 0x00000010: B_(NVDEC ); break; case 0x00000013: B_(CE ); break; case 0x00000014: C_(GSP ); break; - break; default: break; } nvkm_debug(subdev, "%02x.%d (%8s): addr %06x fault %2d " diff --git a/drivers/gpu/drm/qxl/qxl_ioctl.c b/drivers/gpu/drm/qxl/qxl_ioctl.c index 5cea6eea72ab..2...

...746ce9fc4..1156634533f9 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/top/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/top/gk104.c @@ -88,11 +88,10 @@ gk104_top_oneinit(struct nvkm_top *top) case 0x0000000e: B_(NVENC ); break; case 0x0000000f: A_(NVENC1); break; case 0x00000010: B_(NVDEC ); break; case 0x00000013: B_(CE ); break; case 0x00000014: C_(GSP ); break; - break; default: break; } nvkm_debug(subdev, "%02x.%d (%8s): addr %06x fault %2d " diff --git a/drivers/gpu/drm/qxl/qxl_ioctl.c b/drivers/gpu/drm/qxl/qxl_ioctl.c index 5cea6eea72ab..2...