search for: nvclkmode

Displaying 15 results from an estimated 15 matches for "nvclkmode".

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2016 Dec 16
2
NvClkMode and NvMemExec Options
When using the nouveau driver, my screen freezes (and stays frozen) when it starts to more than a minimum amount of work. To fix this, I've been using the nvidia driver with the Preferred Mode set to Prefer Maximum Performance. It looks like equivalent settings in nouveau are NvClkMode and NvMemExec. However, I didn't see any documentation specifying the valid options for these settings? What are the valid options for NvClkMode? What are the valid options for NvMemExec? Thanks. Joseph D. Wagner
2016 Dec 16
1
NvClkMode and NvMemExec Options
...(and stays frozen) >> when it >> starts to more than a minimum amount of work. To fix this, I've been >> using >> the nvidia driver with the Preferred Mode set to Prefer Maximum >> Performance. >> >> It looks like equivalent settings in nouveau are NvClkMode and >> NvMemExec. >> However, I didn't see any documentation specifying the valid options >> for >> these settings? >> >> What are the valid options for NvClkMode? > > This takes the decimal (!) value of the pstate you want to clock to on > boot....
2016 Dec 16
0
NvClkMode and NvMemExec Options
...en using the nouveau driver, my screen freezes (and stays frozen) when it > starts to more than a minimum amount of work. To fix this, I've been using > the nvidia driver with the Preferred Mode set to Prefer Maximum Performance. > > It looks like equivalent settings in nouveau are NvClkMode and NvMemExec. > However, I didn't see any documentation specifying the valid options for > these settings? > > What are the valid options for NvClkMode? This takes the decimal (!) value of the pstate you want to clock to on boot. The valid pstates are defined by your VBIOS, and ar...
2016 Oct 28
1
PowerMizer for nouveau
The only way I can get my nvidia card to work is by using the nvidia driver with these settings: Section "Device" Identifier "Videocard0" Driver "nvidia" Option "RegistryDwords" "PowerMizerEnable=0x1; PerfLevelSrc=0x2222; PowerMizerDefaultAC=0x1" EndSection Otherwise, whether I use the nouveau or nivida driver, it
2020 Oct 06
0
[RFC PATCH v2 2/3] nouveau: Add kernel-docs for module parameters
...; + * * "PCIROM" + * * "PLATFORM" + * * A file name passed on to request_firmware. + * + * * NvBoost (integer): Specify the Boost mode for Fermi and newer. Valid + * options are: + * + * * 0: base clocks (default) + * * 1: boost clocks + * * 2: max clocks + * + * * NvClkMode (string): Force a particular clock level on boot. This is + * equivalent to passing both ``NvClkModeAC`` and ``NvClkModeDC``. + * + * * NvClkModeAC (string): Force a particular clock level when plugged in to a + * power source. + * + * * NvClkModeDC (string): Force a particular clock level when...
2014 May 16
2
[PATCH] clk: allow config option to enable reclocking
...arent); @@ -478,6 +479,9 @@ nouveau_clock_create_(struct nouveau_object *parent, ret = nouveau_pstate_new(clk, idx++); } while (ret == 0); + clk->allow_reclock = + nouveau_boolopt(device->cfgopt, "NvReclock", allow_reclock); + mode = nouveau_stropt(device->cfgopt, "NvClkMode", &arglen); if (mode) { if (!strncasecmpz(mode, "disabled", arglen)) { diff --git a/nvkm/subdev/clock/nv04.c b/nvkm/subdev/clock/nv04.c index b74db6c..eb2d442 100644 --- a/nvkm/subdev/clock/nv04.c +++ b/nvkm/subdev/clock/nv04.c @@ -82,7 +82,8 @@ nv04_clock_ctor(struct nouvea...
2014 May 18
1
[PATCH 1/2] fb: default NvMemExec to on, turning it off is used for debugging only
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- Hope I understood you correctly wrt the mem exec stuff. nvkm/subdev/fb/ramnv50.c | 2 +- nvkm/subdev/fb/ramnva3.c | 2 +- nvkm/subdev/fb/ramnvc0.c | 2 +- nvkm/subdev/fb/ramnve0.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/nvkm/subdev/fb/ramnv50.c b/nvkm/subdev/fb/ramnv50.c index ef91b6e..e5d12c2 100644
2014 May 17
0
[PATCH] clk: allow config option to enable reclocking
...nt, > ret = nouveau_pstate_new(clk, idx++); > } while (ret == 0); > > + clk->allow_reclock = > + nouveau_boolopt(device->cfgopt, "NvReclock", allow_reclock); > + > mode = nouveau_stropt(device->cfgopt, "NvClkMode", &arglen); > if (mode) { > if (!strncasecmpz(mode, "disabled", arglen)) { > diff --git a/nvkm/subdev/clock/nv04.c b/nvkm/subdev/clock/nv04.c > index b74db6c..eb2d442 100644 > --- a/nvkm/subdev/clock/nv04.c > +++ b/nvkm/subdev/clock/nv04....
2016 Apr 28
15
[Bug 95188] New: GeForce 840M (GM108) troubles
https://bugs.freedesktop.org/show_bug.cgi?id=95188 Bug ID: 95188 Summary: GeForce 840M (GM108) troubles Product: xorg Version: git Hardware: Other OS: All Status: NEW Severity: normal Priority: medium Component: Driver/nouveau Assignee: nouveau at lists.freedesktop.org
2017 Feb 22
15
[Bug 99913] New: [G96] Reclocking fails on voltage
...QA Contact: xorg-team at lists.x.org Attempting to set the performance level to 15 on my laptop results in errors. nouveau 0000:01:00.0: NVIDIA G96 (096500a1) nouveau 0000:01:00.0: bios: version 62.94.3c.00.15 nouveau 0000:01:00.0: fb: 512 MiB GDDR3 The kernel module has options: config=NvClkMode=15 That leads to errors: nouveau 0000:01:00.0: clk: failed to raise voltage: -22 ... nouveau 0000:01:00.0: clk: error setting pstate 3: -22 After that the contents of /sys/kernel/debug/dri/0/pstate are: 03: core 169 MHz shader 338 MHz memory 100 MHz 05: core 275 MHz shader 550 MHz memory 300 MHz...
2020 Sep 11
6
[RFC] Documentation: nouveau: Introduce some nouveau documentation
...; + * * "PCIROM" + * * "PLATFORM" + * * A file name passed on to request_firmware. + * + * * NvBoost (integer): Specify the Boost mode for Fermi and newer. Valid + * options are: + * + * * 0: base clocks (default) + * * 1: boost clocks + * * 2: max clocks + * + * * NvClkMode (string): Force a particular clock level on boot. This is + * equivalent to passing both ``NvClkModeAC`` and ``NvClkModeDC``. + * + * * NvClkModeAC (string): Force a particular clock level when plugged in to a + * power source. + * + * * NvClkModeDC (string): Force a particular clock level when...
2020 Sep 23
0
[RFC] Documentation: nouveau: Introduce some nouveau documentation
...M" > + * * A file name passed on to request_firmware. > + * > + * * NvBoost (integer): Specify the Boost mode for Fermi and newer. Valid > + * options are: > + * > + * * 0: base clocks (default) > + * * 1: boost clocks > + * * 2: max clocks > + * > + * * NvClkMode (string): Force a particular clock level on boot. This is > + * equivalent to passing both ``NvClkModeAC`` and ``NvClkModeDC``. > + * > + * * NvClkModeAC (string): Force a particular clock level when plugged in to a > + * power source. > + * > + * * NvClkModeDC (string): Force...
2013 Nov 09
2
[PATCH] drm/nouveau/clk: Initial implementation for reclocking NVAA/NVAC
...uld work on the majority of machines (if not all). In order to reclock, PFIFO must be paused. The first patch hooks up the corrent pausing method for NV50/NV84. Unfortunately, SUBDEV_CLOCK is initialised before ENFINE_FIFO, leading to a nullptr dereference when trying to reclock using config="NvClkMode=xx". Although "failure" on other cards is not as explicit, they do seem to stir up some registers in the PFIFO space as well. I am therefore led to believe the proper fix is initialising PFIFO earlier. However, although I can simply reorder some bits in device.h, I don't oversee...
2014 Dec 22
7
[PATCH V2 1/4] clk: allow non-blocking for nouveau_clock_astate()
There might be some callers of nouveau_clock_astate(), and they are from inetrrupt context. So we must ensure that this function can be atomic in that condition. This patch adds one parameter which is subsequently passed to nouveau_pstate_calc(). Therefore we can choose whether we want to wait for the pstate work's completion or not. Signed-off-by: Vince Hsu <vinceh at nvidia.com> ---
2014 Dec 18
4
[RFC PATCH 0/3] introduce DVFS for GK20A
Hi, This is a try to have some simple DVFS (Dynamic Voltage and Frequency Scaling) support for GK20A. Instead of relying on other existing frequency scaling framework, we create a simple subdev in Nouveau for the same purpose. That's because we don't want to make the DVFS implementation for GK20A far more than enough in the beginning and hinder the implementation for dGPU in the future.