search for: nvc3_mc_oclass

...NE_PPP ] = &nvc0_ppp_oclass; > device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass; > break; > + case 0xea: > + device->cname = "GK20A"; > + device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; > + device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass; > + device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; As per note on the PTIMER patch, can just switch this to "gk20a_timer_oclass" on the latest code. > +...

On 31/12/13 10:36, Ilia Mirkin wrote: > On Tue, Dec 31, 2013 at 5:14 AM, Sid Boyce <sboyce at blueyonder.co.uk> wrote: >> System x86_64 with openSUSE 13.1. >> X.Org version: 1.14.99.905 >> >> openSUSE 12.2 kernels boot successfully into a graphical screen, login to >> KDE4, etc. all normal. >> >> 3.13-rc kernels boot fully with X running but no

...d253fe8 introduced >> it. > Any chance you might mmiotrace the blob (version 325 or later) to see > which registers it fiddles with? Or alternatively, if you have a NVCE > card (you never did end up providing the logs which would have made > that apparent), could you try replacing nvc3_mc_oclass with > nvc0_mc_oclass for the 0xce case in > drivers/gpu/drm/nouveau/core/engine/device/nvc0.c? (and boot without > the MSI disabling.) The switch has already been made for NVC8 in > 0bae1d61c75 -- perhaps there are more "odd" ones. > > -ilia > Fails exactly the sa...

...>>> Any chance you might mmiotrace the blob (version 325 or later) to see >>> which registers it fiddles with? Or alternatively, if you have a NVCE >>> card (you never did end up providing the logs which would have made >>> that apparent), could you try replacing nvc3_mc_oclass with >>> nvc0_mc_oclass for the 0xce case in >>> drivers/gpu/drm/nouveau/core/engine/device/nvc0.c? (and boot without >>> the MSI disabling.) The switch has already been made for NVC8 in >>> 0bae1d61c75 -- perhaps there are more "odd" ones. >>>...

...3a63b3bff672d1a0ee6a35ad253fe8 introduced > it. Any chance you might mmiotrace the blob (version 325 or later) to see which registers it fiddles with? Or alternatively, if you have a NVCE card (you never did end up providing the logs which would have made that apparent), could you try replacing nvc3_mc_oclass with nvc0_mc_oclass for the 0xce case in drivers/gpu/drm/nouveau/core/engine/device/nvc0.c? (and boot without the MSI disabling.) The switch has already been made for NVC8 in 0bae1d61c75 -- perhaps there are more "odd" ones. -ilia

...t; it. >> >> Any chance you might mmiotrace the blob (version 325 or later) to see >> which registers it fiddles with? Or alternatively, if you have a NVCE >> card (you never did end up providing the logs which would have made >> that apparent), could you try replacing nvc3_mc_oclass with >> nvc0_mc_oclass for the 0xce case in >> drivers/gpu/drm/nouveau/core/engine/device/nvc0.c? (and boot without >> the MSI disabling.) The switch has already been made for NVC8 in >> 0bae1d61c75 -- perhaps there are more "odd" ones. >> >> -ilia &...

...,26 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass; break; + case 0xea: + device->cname = "GK20A"; + device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; + device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass; + device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; + device->oclass[NVDEV_SUBDEV_FB ] = nvea_fb_oclass; + device->oclass[NVDEV_SUBDEV_IBUS ] = &nvea_ibus_oclass; + device->oclass[NVDEV_SUBDEV_IN...

...Any chance you might mmiotrace the blob (version 325 or later) to see >>>> which registers it fiddles with? Or alternatively, if you have a NVCE >>>> card (you never did end up providing the logs which would have made >>>> that apparent), could you try replacing nvc3_mc_oclass with >>>> nvc0_mc_oclass for the 0xce case in >>>> drivers/gpu/drm/nouveau/core/engine/device/nvc0.c? (and boot without >>>> the MSI disabling.) The switch has already been made for NVC8 in >>>> 0bae1d61c75 -- perhaps there are more "odd" on...

...ss[NVDEV_SUBDEV_CLOCK ] = &nve0_clock_oclass; + device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass; + device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; + device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass; + device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; + device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass; + device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; + device->oclass[NVDEV_SUBDEV_FB ] = nve0_fb_oclass; + device->oclass[NVDEV_SUBDEV_LTCG ] = gf100_ltcg_oclass; + device->oclass[NVDEV_SUBDEV_IBUS...

On Tue, Dec 31, 2013 at 5:14 AM, Sid Boyce <sboyce at blueyonder.co.uk> wrote: > System x86_64 with openSUSE 13.1. > X.Org version: 1.14.99.905 > > openSUSE 12.2 kernels boot successfully into a graphical screen, login to > KDE4, etc. all normal. > > 3.13-rc kernels boot fully with X running but no graphical screen and it > freezes in VC with not all the startup

...device) >> break; >> case 0xea: >> device->cname = "GK20A"; >> + device->oclass[NVDEV_SUBDEV_CLOCK ] = >> &gk20a_clock_oclass; >> device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; >> device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass; >> device->oclass[NVDEV_SUBDEV_TIMER ] = >> &gk20a_timer_oclass; >> diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/clock.h >> b/drivers/gpu/drm/nouveau/cor...

...engine/device/nve0.c > @@ -158,6 +158,7 @@ nve0_identify(struct nouveau_device *device) > break; > case 0xea: > device->cname = "GK20A"; > + device->oclass[NVDEV_SUBDEV_CLOCK ] = &gk20a_clock_oclass; > device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; > device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass; > device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; > diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/clock.h b/drivers/gpu/drm/nouveau/core/include/subdev/clock.h > index c0fe191c9787..9fed...

...++ b/drivers/gpu/drm/nouveau/core/engine/device/nve0.c @@ -158,6 +158,7 @@ nve0_identify(struct nouveau_device *device) break; case 0xea: device->cname = "GK20A"; + device->oclass[NVDEV_SUBDEV_CLOCK ] = &gk20a_clock_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/clock.h b/drivers/gpu/drm/nouveau/core/include/subdev/clock.h index c0fe191c9787..9fed2834f25e 100644 --- a/...

This series adds support for reclocking on GK20A. The first two patches touch the clock subsystem to allow GK20A to operate, by making the presence of the thermal and voltage devices optional, and allowing pstates to be provided directly instead of being probed using the BIOS (which Tegra does not have). The last patch adds the GK20A clock device. Arguably the clock can be seen as a stripped-down

Hi everyone, Here is the second batch of patches to add GK20A support to Nouveau. This time we are adding the actual chip support, and this series brings the driver to a point where a slightly-tweaked Mesa successfully runs shaders and renders triangles on GBM! Many thanks to Thierry Reding and the people on the #nouveau IRC channel for their help without which we would not have reached this

Latest patches for GK20A, taking comments received for v3 into account. Changes since v3: - use only pfn_to_page() and page_to_pfn() in GK20A's FB. These functions are present on every arch and the physical address to page frame number conversion is also consistently a shift of PAGE_SHIFT. This part will probably be replaced by something nicer in the future anyway. - fixed a warning on

Hi everyone, Way overdue v2 of the final patches that enable basic GK20A support. Hopefully all the issues raised with v1 have been addressed. Changes since v1: - Use gk20a clock driver by Ben instead of twiddling nv04's - Name new classes after gk20a instead of nvea - Addressed comments about BAR initialization code factorization - Removed non-essential code which only purpose was to avoid

Changes since v2: - Enabled software class - Removed unneeded changes to nouveau_accel_init() - Replaced use of architecture-private pfn_to_dma() and dma_to_pfn() with the portable page_to_phys()/phys_to_page() - Fixed incorrect comment/commit log talking about bytes instead of words Hope this looks good! Once this gets merged the next set will be to use this driver on Jetson and Venice2

Hello everyone, GK20A is the Kepler-based GPU used in the upcoming Tegra K1 chips. The following patches perform architectural changes to Nouveau that are necessary to support non-PCI GPUs and add initial support for GK20A. Although the support is still very basic and more user-space changes will be needed to make the full graphics stack run on top of it, we were able to successfully open