Displaying 8 results from an estimated 8 matches for "nvc0_screen_get_shader_param".
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nv30_screen_get_shader_param
2015 Dec 02
3
NV50 compute support questions
...class_3d >= NVE4_3D_CLASS) ? 1 : 0;
case PIPE_CAP_COMPUTE:
- return (class_3d <= NVE4_3D_CLASS) ? 1 : 0;
+ return 1;
case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
return nouveau_screen(pscreen)->vram_domain & NOUVEAU_BO_VRAM ? 1 : 0;
@@ -246,8 +246,6 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
return 0;
break;
case PIPE_SHADER_COMPUTE:
- if (class_3d > NVE4_3D_CLASS)
- return 0;
break;
default:
return 0;
@@ -574,11 +572,10 @@ nvc0_screen_init_compute(struct nvc0_screen *screen)...
2015 Dec 02
0
NV50 compute support questions
...> case PIPE_CAP_COMPUTE:
> - return (class_3d <= NVE4_3D_CLASS) ? 1 : 0;
> + return 1;
> case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
> return nouveau_screen(pscreen)->vram_domain & NOUVEAU_BO_VRAM ?
> 1 : 0;
>
> @@ -246,8 +246,6 @@ nvc0_screen_get_shader_param(struct pipe_screen
> *pscreen, unsigned shader,
> return 0;
> break;
> case PIPE_SHADER_COMPUTE:
> - if (class_3d > NVE4_3D_CLASS)
> - return 0;
> break;
> default:
> return 0;
> @@ -574,11 +572,10 @@ nvc0_sc...
2015 Dec 04
0
NV50 compute support questions
...urn (class_3d <= NVE4_3D_CLASS) ? 1 : 0;
>>> + return 1;
>>> case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
>>> return nouveau_screen(pscreen)->vram_domain & NOUVEAU_BO_VRAM ?
>>> 1 : 0;
>>>
>>> @@ -246,8 +246,6 @@ nvc0_screen_get_shader_param(struct pipe_screen
>>> *pscreen, unsigned shader,
>>> return 0;
>>> break;
>>> case PIPE_SHADER_COMPUTE:
>>> - if (class_3d > NVE4_3D_CLASS)
>>> - return 0;
>>> break;
>>> de...
2014 Jun 06
3
[PATCH 1/3] gk110/ir: emit texbar the same way that the blob does
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.2" <mesa-stable at lists.freedestkop.org>
---
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
index b8d0d3e..d566c99
2015 Dec 04
4
NV50 compute support questions
...UTE:
>> - return (class_3d <= NVE4_3D_CLASS) ? 1 : 0;
>> + return 1;
>> case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
>> return nouveau_screen(pscreen)->vram_domain & NOUVEAU_BO_VRAM ?
>> 1 : 0;
>>
>> @@ -246,8 +246,6 @@ nvc0_screen_get_shader_param(struct pipe_screen
>> *pscreen, unsigned shader,
>> return 0;
>> break;
>> case PIPE_SHADER_COMPUTE:
>> - if (class_3d > NVE4_3D_CLASS)
>> - return 0;
>> break;
>> default:
>> return 0...
2015 Nov 20
2
NV50 compute support questions
Hi,
On 20-11-15 17:07, Samuel Pitoiset wrote:
>
>
> On 11/20/2015 11:36 AM, Hans de Goede wrote:
>> Hi Samual, et al,
>
> Hi Hans,
>
>>
>> In
>> http://cgit.freedesktop.org/mesa/mesa/commit/src/gallium/drivers/nouveau?id=ff72440b40211326eda118232fabd53965410afd
>>
>> you write: "This compute support has been tested by
>> Pierre
2015 Feb 20
10
[PATCH 01/11] nvc0/ir: add emission of dadd/dmul/dmad opcodes, fix minmax
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
.../drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 66 +++++++++++++++++++++-
1 file changed, 63 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
index dfb093c..e38a3b8 100644
---
2015 May 17
14
[PATCH 00/12] Tessellation support for nvc0
This is enough to enable tessellation support on nvc0. It seems to
work a lot better on my GF108 than GK208. I suspect that there's some
sort of scheduling shenanigans that need to be adjusted for
kepler+. Or perhaps some shader header things.
Even with the GF108, I still get occasional blue triangles in Heaven,
but I get a *ton* of them on the GK208 -- seemingly the same issue,
but it's