search for: nvc0_graph_init_fw

Displaying 9 results from an estimated 9 matches for "nvc0_graph_init_fw".

2014 Apr 21
2
[PATCH v2 07/10] drm/nouveau/graph: pad firmware code at load time
...--git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c > index e5b75f189988..013475c62986 100644 > --- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c > +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c > @@ -894,6 +894,10 @@ nvc0_graph_init_fw(struct nvc0_graph_priv *priv, u32 fuc_base, > nv_wr32(priv, fuc_base + 0x0188, i >> 6); > nv_wr32(priv, fuc_base + 0x0184, code->data[i]); > } > + > + /* code must be padded to 0x40 bytes */ > + for (; i & 0x...
2014 Mar 26
1
[PATCH 09/12] drm/nouveau/graph: pad firmware code at load time
...--git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c > index f997a18f5760..367e72daf8b1 100644 > --- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c > +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c > @@ -768,6 +768,10 @@ nvc0_graph_init_fw(struct nvc0_graph_priv *priv, u32 fuc_base, > nv_wr32(priv, fuc_base + 0x0188, i >> 6); > nv_wr32(priv, fuc_base + 0x0184, code->data[i]); > } > + > + /* code must be padded to 0x40 */ > + for (; i < (((code-&...
2014 Mar 24
0
[PATCH 09/12] drm/nouveau/graph: pad firmware code at load time
...insertions(+) diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c index f997a18f5760..367e72daf8b1 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c @@ -768,6 +768,10 @@ nvc0_graph_init_fw(struct nvc0_graph_priv *priv, u32 fuc_base, nv_wr32(priv, fuc_base + 0x0188, i >> 6); nv_wr32(priv, fuc_base + 0x0184, code->data[i]); } + + /* code must be padded to 0x40 */ + for (; i < (((code->size / 4) + 0x3f) & ~0x3f); i++) + nv_wr32(priv, fuc_base + 0x0184, 0);...
2014 Apr 21
0
[PATCH v2 07/10] drm/nouveau/graph: pad firmware code at load time
...insertions(+) diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c index e5b75f189988..013475c62986 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c @@ -894,6 +894,10 @@ nvc0_graph_init_fw(struct nvc0_graph_priv *priv, u32 fuc_base, nv_wr32(priv, fuc_base + 0x0188, i >> 6); nv_wr32(priv, fuc_base + 0x0184, code->data[i]); } + + /* code must be padded to 0x40 bytes */ + for (; i & 0x3f; i++) + nv_wr32(priv, fuc_base + 0x0184, 0); } static void -- 1.9.2
2014 Apr 21
0
[PATCH v2 07/10] drm/nouveau/graph: pad firmware code at load time
.../gpu/drm/nouveau/core/engine/graph/nvc0.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c >> index e5b75f189988..013475c62986 100644 >> --- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c >> +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c >> @@ -894,6 +894,10 @@ nvc0_graph_init_fw(struct nvc0_graph_priv *priv, u32 fuc_base, >> nv_wr32(priv, fuc_base + 0x0188, i >> 6); >> nv_wr32(priv, fuc_base + 0x0184, code->data[i]); >> } >> + >> + /* code must be padded to 0x40 bytes */ >> +...
2014 Apr 21
13
[PATCH v2 00/10] drm/nouveau: support for GK20A, cont'd
Hi everyone, Way overdue v2 of the final patches that enable basic GK20A support. Hopefully all the issues raised with v1 have been addressed. Changes since v1: - Use gk20a clock driver by Ben instead of twiddling nv04's - Name new classes after gk20a instead of nvea - Addressed comments about BAR initialization code factorization - Removed non-essential code which only purpose was to avoid
2014 Mar 24
27
[PATCH 00/12] drm/nouveau: support for GK20A, cont'd
Hi everyone, Here is the second batch of patches to add GK20A support to Nouveau. This time we are adding the actual chip support, and this series brings the driver to a point where a slightly-tweaked Mesa successfully runs shaders and renders triangles on GBM! Many thanks to Thierry Reding and the people on the #nouveau IRC channel for their help without which we would not have reached this
2014 May 02
10
[PATCH v4 0/9] drm/nouveau: support for GK20A, cont'd
Latest patches for GK20A, taking comments received for v3 into account. Changes since v3: - use only pfn_to_page() and page_to_pfn() in GK20A's FB. These functions are present on every arch and the physical address to page frame number conversion is also consistently a shift of PAGE_SHIFT. This part will probably be replaced by something nicer in the future anyway. - fixed a warning on
2014 Apr 25
12
[PATCH v3 0/9] drm/nouveau: support for GK20A, cont'd
Changes since v2: - Enabled software class - Removed unneeded changes to nouveau_accel_init() - Replaced use of architecture-private pfn_to_dma() and dma_to_pfn() with the portable page_to_phys()/phys_to_page() - Fixed incorrect comment/commit log talking about bytes instead of words Hope this looks good! Once this gets merged the next set will be to use this driver on Jetson and Venice2