search for: nvc0_domain

...lock/nvc0.c index c310572..dbf8517 100644 --- a/nvkm/subdev/clock/nvc0.c +++ b/nvkm/subdev/clock/nvc0.c @@ -437,7 +437,8 @@ nvc0_clock_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nvc0_clock_priv *priv; int ret; - ret = nouveau_clock_create(parent, engine, oclass, nvc0_domain, &priv); + ret = nouveau_clock_create(parent, engine, oclass, nvc0_domain, false, + &priv); *pobject = nv_object(priv); if (ret) return ret; diff --git a/nvkm/subdev/clock/nve0.c b/nvkm/subdev/clock/nve0.c index d3c37c9..860aa73 100644 --- a/nvkm/subdev/clock/nve0.c +++ b/nvkm/...

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- Hope I understood you correctly wrt the mem exec stuff. nvkm/subdev/fb/ramnv50.c | 2 +- nvkm/subdev/fb/ramnva3.c | 2 +- nvkm/subdev/fb/ramnvc0.c | 2 +- nvkm/subdev/fb/ramnve0.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/nvkm/subdev/fb/ramnv50.c b/nvkm/subdev/fb/ramnv50.c index ef91b6e..e5d12c2 100644

...a/nvkm/subdev/clock/nvc0.c > +++ b/nvkm/subdev/clock/nvc0.c > @@ -437,7 +437,8 @@ nvc0_clock_ctor(struct nouveau_object *parent, struct nouveau_object *engine, > struct nvc0_clock_priv *priv; > int ret; > > - ret = nouveau_clock_create(parent, engine, oclass, nvc0_domain, &priv); > + ret = nouveau_clock_create(parent, engine, oclass, nvc0_domain, false, > + &priv); > *pobject = nv_object(priv); > if (ret) > return ret; > diff --git a/nvkm/subdev/clock/nve0.c b/nvkm/subd...

Second version of the gk20a clock patches. I have tried to keep the therm and volt devices mandatory in the clock driver, but unfortunately they are too tied to bios to allow this, at least for the moment. Consequently this version is mostly a port of the first version to Ben's tree. Ben, please let me know what I have done wrong in terms of integration to your tree, as the main purpose of

This series adds support for reclocking on GK20A. The first two patches touch the clock subsystem to allow GK20A to operate, by making the presence of the thermal and voltage devices optional, and allowing pstates to be provided directly instead of being probed using the BIOS (which Tegra does not have). The last patch adds the GK20A clock device. Arguably the clock can be seen as a stripped-down