search for: nvc0_bar_ctor

Displaying 18 results from an estimated 18 matches for "nvc0_bar_ctor".

2014 Jun 27
5
[PATCH 1/2] drm/nouveau/bar: add noncached ioremap property
Some BARs (like GK20A's) do not support being ioremapped write-combined. Add a boolean property to the BAR structure and handle that case in the Nouveau BO implementation. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drivers/gpu/drm/nouveau/core/include/subdev/bar.h | 3 +++ drivers/gpu/drm/nouveau/nouveau_bo.c | 17 ++++++++++++----- 2 files changed, 15
2014 Mar 24
1
[PATCH 04/12] drm/nouveau/bar/nvc0: support chips without BAR3
On Mon, Mar 24, 2014 at 05:42:26PM +0900, Alexandre Courbot wrote: [...] > diff --git a/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c b/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c [...] > static int > -nvc0_bar_ctor(struct nouveau_object *parent, struct nouveau_object *engine, > - struct nouveau_oclass *oclass, void *data, u32 size, > - struct nouveau_object **pobject) > +nvc0_bar_init_vm(struct nvc0_bar_priv *priv, int nr, int bar) > { [...] > - /* BAR3 */ > ret = nouveau_gpuo...
2014 Jun 28
1
[PATCH v2] drm/gk20a: add BAR instance
...nouveau_object >>>*engine, >>>+ struct nouveau_oclass *oclass, void *data, u32 size, >>>+ struct nouveau_object **pobject) >>>+{ >>>+ struct nouveau_bar *bar; >>>+ int ret; >>>+ >>>+ ret = nvc0_bar_ctor(parent, engine, oclass, data, size, pobject); >>>+ if (ret) >>>+ return ret; >>>+ >>>+ bar = (struct nouveau_bar *)*pobject; >>>+ bar->iomap_uncached = true; >>>+ >>>+ return 0; >>>+} >&gt...
2014 Jun 27
0
[PATCH 2/2] drm/gk20a: add BAR instance
...include <subdev/bar.h> + +#include "priv.h" + +int +gk20a_bar_ctor(struct nouveau_object *parent, struct nouveau_object *engine, + struct nouveau_oclass *oclass, void *data, u32 size, + struct nouveau_object **pobject) +{ + struct nouveau_bar *bar; + int ret; + + ret = nvc0_bar_ctor(parent, engine, oclass, data, size, pobject); + if (ret) + return ret; + + bar = *pobject; + bar->iomap_uncached = true; + + return 0; +} + +struct nouveau_oclass +gk20a_bar_oclass = { + .handle = NV_SUBDEV(BAR, 0xea), + .ofuncs = &(struct nouveau_ofuncs) { + .ctor = gk20a_bar_ctor, + .dt...
2014 Jun 28
0
[PATCH v2] drm/gk20a: add BAR instance
...nouveau_object *parent, struct nouveau_object >>*engine, >>+ struct nouveau_oclass *oclass, void *data, u32 size, >>+ struct nouveau_object **pobject) >>+{ >>+ struct nouveau_bar *bar; >>+ int ret; >>+ >>+ ret = nvc0_bar_ctor(parent, engine, oclass, data, size, pobject); >>+ if (ret) >>+ return ret; >>+ >>+ bar = (struct nouveau_bar *)*pobject; >>+ bar->iomap_uncached = true; >>+ >>+ return 0; >>+} >>+ >>+struct nouveau_oclas...
2014 Feb 04
1
[RFC 07/16] drm/nouveau/bar/nvc0: support chips without BAR3
...core/subdev/bar/nvc0.c > index 3f30db6..c2bb0e5 100644 > --- a/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c > +++ b/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c > @@ -79,87 +79,88 @@ nvc0_bar_unmap(struct nouveau_bar *bar, struct nouveau_vma *vma) > } > > static int > -nvc0_bar_ctor(struct nouveau_object *parent, struct nouveau_object *engine, > - struct nouveau_oclass *oclass, void *data, u32 size, > - struct nouveau_object **pobject) > +nvc0_bar_init_vm(struct nvc0_bar_priv *priv, int nr, int bar) > { > - struct nouveau_device *d...
2014 Mar 24
0
[PATCH 04/12] drm/nouveau/bar/nvc0: support chips without BAR3
...c b/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c index 3f30db62e656..5da1b9447af0 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c +++ b/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c @@ -79,87 +79,88 @@ nvc0_bar_unmap(struct nouveau_bar *bar, struct nouveau_vma *vma) } static int -nvc0_bar_ctor(struct nouveau_object *parent, struct nouveau_object *engine, - struct nouveau_oclass *oclass, void *data, u32 size, - struct nouveau_object **pobject) +nvc0_bar_init_vm(struct nvc0_bar_priv *priv, int nr, int bar) { - struct nouveau_device *device = nv_device(parent); - struct nvc0_ba...
2014 Feb 01
0
[RFC 07/16] drm/nouveau/bar/nvc0: support chips without BAR3
.../bar/nvc0.c b/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c index 3f30db6..c2bb0e5 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c +++ b/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c @@ -79,87 +79,88 @@ nvc0_bar_unmap(struct nouveau_bar *bar, struct nouveau_vma *vma) } static int -nvc0_bar_ctor(struct nouveau_object *parent, struct nouveau_object *engine, - struct nouveau_oclass *oclass, void *data, u32 size, - struct nouveau_object **pobject) +nvc0_bar_init_vm(struct nvc0_bar_priv *priv, int nr, int bar) { - struct nouveau_device *device = nv_device(parent); - struct nvc0_ba...
2014 Feb 12
0
[PATCH v2] drm/nouveau: support for platform devices
...tart, &vm); if (ret) diff --git a/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c b/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c index bac5e754de35..3f30db62e656 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c +++ b/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c @@ -84,7 +84,6 @@ nvc0_bar_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_object **pobject) { struct nouveau_device *device = nv_device(parent); - struct pci_dev *pdev = device->pdev; struct nvc0_bar_priv *priv; struct nouveau_gpuobj *mem; struct nouveau_vm *vm; @@ -107,14 +1...
2014 Feb 12
2
[PATCH v2] drm/nouveau: support for platform devices
On 12/02/14 05:38, Alexandre Courbot wrote: > Upcoming mobile Kepler GPUs (such as GK20A) use the platform bus instead > of PCI to which Nouveau is tightly dependent. This patch allows Nouveau > to handle platform devices by: > > - abstracting PCI-dependent functions that were typically used for > resource querying and page mapping, > - introducing a nv_device_is_pci()
2014 Feb 11
2
[PATCH] drm/nouveau: support for platform devices
On Mon, Feb 10, 2014 at 8:50 PM, Thierry Reding <thierry.reding at gmail.com> wrote: > On Mon, Feb 10, 2014 at 02:53:00PM +0900, Alexandre Courbot wrote: > [...] >> diff --git a/drivers/gpu/drm/nouveau/core/engine/device/base.c b/drivers/gpu/drm/nouveau/core/engine/device/base.c > [...] >> +resource_size_t >> +nv_device_resource_start(struct nouveau_device *device,
2014 Feb 10
2
[PATCH] drm/nouveau: support for platform devices
...tart, &vm); if (ret) diff --git a/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c b/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c index bac5e754de35..3f30db62e656 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c +++ b/drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c @@ -84,7 +84,6 @@ nvc0_bar_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_object **pobject) { struct nouveau_device *device = nv_device(parent); - struct pci_dev *pdev = device->pdev; struct nvc0_bar_priv *priv; struct nouveau_gpuobj *mem; struct nouveau_vm *vm; @@ -107,14 +1...
2014 Feb 01
28
[RFC 00/16] drm/nouveau: initial support for GK20A (Tegra K1)
Hello everyone, GK20A is the Kepler-based GPU used in the upcoming Tegra K1 chips. The following patches perform architectural changes to Nouveau that are necessary to support non-PCI GPUs and add initial support for GK20A. Although the support is still very basic and more user-space changes will be needed to make the full graphics stack run on top of it, we were able to successfully open
2013 Sep 26
2
Resource map sanity check fails after GRUB "keeps" the gfx mode
...f81083e06>] warn_slowpath_fmt+0x46/0x50 [<ffffffff81079512>] __ioremap_caller+0x372/0x380 [<ffffffff813a8de0>] ? nouveau_bar_create_+0x80/0xb0 [<ffffffff81079577>] ioremap_nocache+0x17/0x20 [<ffffffff813a8de0>] nouveau_bar_create_+0x80/0xb0 [<ffffffff813a984b>] nvc0_bar_ctor+0x4b/0x440 [<ffffffff813a733e>] nouveau_object_ctor+0x3e/0xf0 [<ffffffff813cdfd5>] nouveau_devobj_ctor+0x195/0x700 [<ffffffff813a733e>] nouveau_object_ctor+0x3e/0xf0 [<ffffffff813a7cf7>] nouveau_object_new+0x197/0x250 [<ffffffff81404a6d>] nouveau_drm_load+0x1cd/0x...
2014 Mar 24
27
[PATCH 00/12] drm/nouveau: support for GK20A, cont'd
Hi everyone, Here is the second batch of patches to add GK20A support to Nouveau. This time we are adding the actual chip support, and this series brings the driver to a point where a slightly-tweaked Mesa successfully runs shaders and renders triangles on GBM! Many thanks to Thierry Reding and the people on the #nouveau IRC channel for their help without which we would not have reached this
2014 May 02
10
[PATCH v4 0/9] drm/nouveau: support for GK20A, cont'd
Latest patches for GK20A, taking comments received for v3 into account. Changes since v3: - use only pfn_to_page() and page_to_pfn() in GK20A's FB. These functions are present on every arch and the physical address to page frame number conversion is also consistently a shift of PAGE_SHIFT. This part will probably be replaced by something nicer in the future anyway. - fixed a warning on
2014 Apr 21
13
[PATCH v2 00/10] drm/nouveau: support for GK20A, cont'd
Hi everyone, Way overdue v2 of the final patches that enable basic GK20A support. Hopefully all the issues raised with v1 have been addressed. Changes since v1: - Use gk20a clock driver by Ben instead of twiddling nv04's - Name new classes after gk20a instead of nvea - Addressed comments about BAR initialization code factorization - Removed non-essential code which only purpose was to avoid
2014 Apr 25
12
[PATCH v3 0/9] drm/nouveau: support for GK20A, cont'd
Changes since v2: - Enabled software class - Removed unneeded changes to nouveau_accel_init() - Replaced use of architecture-private pfn_to_dma() and dma_to_pfn() with the portable page_to_phys()/phys_to_page() - Fixed incorrect comment/commit log talking about bytes instead of words Hope this looks good! Once this gets merged the next set will be to use this driver on Jetson and Venice2