Displaying 20 results from an estimated 69 matches for "nvc0_3d".
2014 Jun 14
7
[PATCH 0/3] ARB_viewport_array for nvc0
This patch-series implements the ARB_viewport_array for nvc0 and does
a little house-cleanig afterwords.
Tobias Klausmann (3):
nvc0: implement multiple viewports/scissors, enable ARB_viewport_array
nvc0: mark scissor in nvc0_clear_{}
nv50/ir: Remove NV50_SEMANTIC_VIEWPORTINDEX and its last consumer
.../drivers/nouveau/codegen/nv50_ir_driver.h | 1 -
2014 May 27
1
[PATCH V3] nvc0: implement clear_buffer
...set, size, data, data_size);
+ return;
+ }
+
+ elements = size / data_size;
+
+ height = (elements + 16383) / 16384;
+
+ width = elements / height;
+
+ if (!PUSH_SPACE(push, 40))
+ return;
+
+ PUSH_REFN (push, buf->bo, buf->domain | NOUVEAU_BO_WR);
+
+ BEGIN_NVC0(push, NVC0_3D(CLEAR_COLOR(0)), 4);
+ PUSH_DATAf(push, color.f[0]);
+ PUSH_DATAf(push, color.f[1]);
+ PUSH_DATAf(push, color.f[2]);
+ PUSH_DATAf(push, color.f[3]);
+ BEGIN_NVC0(push, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2);
+ PUSH_DATA (push, width << 16);
+ PUSH_DATA (push, height << 16);
+
+...
2014 Jul 10
3
[PATCH 0/3] nvc0: ARB_(multi_)draw_indirect support
...src/gallium/drivers/nouveau/nv50/nv50_3d.xml.h | 2 +-
src/gallium/drivers/nouveau/nv50/nv50_screen.c | 2 +
src/gallium/drivers/nouveau/nvc0/mme/com9097.mme | 75 ++++++++++++++++++
src/gallium/drivers/nouveau/nvc0/mme/com9097.mme.h | 56 ++++++++++++++
src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h | 6 ++
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 13 +++-
src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c | 90 ++++++++++++++++------
.../drivers/nouveau/nvc0/nvc0_vbo_translate.c | 41 ++++++----
12 files changed, 254 insertions(+), 46 deletions(-)
--
1.8.5.5
2014 May 26
2
Implement buffer_clear for nvc0
Hi, please review the following patch!
Thanks,
Tobias Klausmann
2014 May 26
1
[PATCH V2] nvc0: implement clear_buffer
...data_size);
+ }
+ else {
+
+ elements = size / data_size;
+
+ height = (elements + 16383) / 16384;
+
+ width = elements / height;
+
+ if (!PUSH_SPACE(push, 40))
+ return;
+
+ PUSH_REFN (push, buf->bo, buf->domain | NOUVEAU_BO_WR);
+
+ BEGIN_NVC0(push, NVC0_3D(CLEAR_COLOR(0)), 4);
+ PUSH_DATAf(push, color.f[0]);
+ PUSH_DATAf(push, color.f[1]);
+ PUSH_DATAf(push, color.f[2]);
+ PUSH_DATAf(push, color.f[3]);
+ BEGIN_NVC0(push, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2);
+ PUSH_DATA (push, width << 16);
+ PUSH_DATA (push, hei...
2014 Jun 15
4
[PATCH v2 0/3] ARB_viewport_array for nvc0
This patch-series implements the ARB_viewport_array for nvc0 and does
a little house-cleanig afterwords.
V2:
Add Release-Notes, mark this in GL3 as done for nvc0
Don't mark the scissors dirty when we don't need to do that
Tobias Klausmann (3):
nvc0: implement multiple viewports/scissors, enable ARB_viewport_array
docs: update GL3.txt, relnotes: mark GL_ARB_viewport_array as done
2014 Jun 15
0
[PATCH v2 1/3] nvc0: implement multiple viewports/scissors, enable ARB_viewport_array
...return 0;
case PIPE_CAP_MAX_VIEWPORTS:
- return 1;
+ return NVC0_MAX_VIEWPORTS;
case PIPE_CAP_TEXTURE_QUERY_LOD:
case PIPE_CAP_SAMPLE_SHADING:
case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
@@ -933,19 +933,23 @@ nvc0_screen_create(struct nouveau_device *dev)
BEGIN_NVC0(push, NVC0_3D(VIEWPORT_TRANSFORM_EN), 1);
PUSH_DATA (push, 1);
- BEGIN_NVC0(push, NVC0_3D(DEPTH_RANGE_NEAR(0)), 2);
- PUSH_DATAf(push, 0.0f);
- PUSH_DATAf(push, 1.0f);
+ for (i = 0; i < NVC0_MAX_VIEWPORTS; i++) {
+ BEGIN_NVC0(push, NVC0_3D(DEPTH_RANGE_NEAR(i)), 2);
+ PUSH_DATAf(push, 0.0...
2014 Jun 14
0
[PATCH 1/3] nvc0: implement multiple viewports/scissors, enable ARB_viewport_array
...return 0;
case PIPE_CAP_MAX_VIEWPORTS:
- return 1;
+ return NVC0_MAX_VIEWPORTS;
case PIPE_CAP_TEXTURE_QUERY_LOD:
case PIPE_CAP_SAMPLE_SHADING:
case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
@@ -933,19 +933,23 @@ nvc0_screen_create(struct nouveau_device *dev)
BEGIN_NVC0(push, NVC0_3D(VIEWPORT_TRANSFORM_EN), 1);
PUSH_DATA (push, 1);
- BEGIN_NVC0(push, NVC0_3D(DEPTH_RANGE_NEAR(0)), 2);
- PUSH_DATAf(push, 0.0f);
- PUSH_DATAf(push, 1.0f);
+ for (i = 0; i < NVC0_MAX_VIEWPORTS; i++) {
+ BEGIN_NVC0(push, NVC0_3D(DEPTH_RANGE_NEAR(i)), 2);
+ PUSH_DATAf(push, 0.0...
2014 May 26
0
[PATCH] nvc0: Implement buffer_clear for this type of hardware
...+
+ if (data_size != 12) {
+
+ elements = size / data_size;
+
+ height = (elements + 16383) / 16384;
+
+ width = elements / height;
+
+ if (!PUSH_SPACE(push, 40))
+ return;
+
+ PUSH_REFN (push, buf->bo, buf->domain | NOUVEAU_BO_WR);
+
+ BEGIN_NVC0(push, NVC0_3D(CLEAR_COLOR(0)), 4);
+ PUSH_DATAf(push, color.f[0]);
+ PUSH_DATAf(push, color.f[1]);
+ PUSH_DATAf(push, color.f[2]);
+ PUSH_DATAf(push, color.f[3]);
+ BEGIN_NVC0(push, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2);
+ PUSH_DATA (push, width << 16);
+ PUSH_DATA (push, hei...
2014 Jun 14
0
[PATCH 2/3] nvc0: mark scissor in nvc0_clear_{}
...vc0/nvc0_surface.c b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
index c28ec6d..72227b8 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
@@ -298,6 +298,7 @@ nvc0_clear_render_target(struct pipe_context *pipe,
BEGIN_NVC0(push, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2);
PUSH_DATA (push, ( width << 16) | dstx);
PUSH_DATA (push, (height << 16) | dsty);
+ nvc0->scissors_dirty |= 1;
BEGIN_NVC0(push, NVC0_3D(RT_CONTROL), 1);
PUSH_DATA (push, 1);
@@ -447,6 +448,7 @@ nvc0_clear_buffer(struct pipe_context *pipe...
2014 Jan 17
2
[PATCH] nv50, nvc0: only clear out the buffers that we were asked to clear
...au/nvc0/nvc0_surface.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
@@ -427,9 +427,6 @@ nvc0_clear(struct pipe_context *pipe, unsigned buffers,
PUSH_DATAf(push, color->f[1]);
PUSH_DATAf(push, color->f[2]);
PUSH_DATAf(push, color->f[3]);
- mode =
- NVC0_3D_CLEAR_BUFFERS_R | NVC0_3D_CLEAR_BUFFERS_G |
- NVC0_3D_CLEAR_BUFFERS_B | NVC0_3D_CLEAR_BUFFERS_A;
}
if (buffers & PIPE_CLEAR_DEPTH) {
@@ -444,12 +441,16 @@ nvc0_clear(struct pipe_context *pipe, unsigned buffers,
mode |= NVC0_3D_CLEAR_BUFFERS_S;
}
- BEGIN_NVC0(pus...
2014 Mar 01
0
[PATCH] nv50,nvc0: add 11f_11f_10f vertex support
..... only assuming about nvc0, but it seems reasonable since all the other
attributes are the same.
docs/GL3.txt | 2 +-
src/gallium/drivers/nouveau/nv50/nv50_3d.xml.h | 1 +
src/gallium/drivers/nouveau/nv50/nv50_formats.c | 2 +-
src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h | 1 +
4 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/docs/GL3.txt b/docs/GL3.txt
index 755a89c..9738ffc 100644
--- a/docs/GL3.txt
+++ b/docs/GL3.txt
@@ -177,7 +177,7 @@ GL 4.4:
GL_ARB_query_buffer_object not started
GL_ARB_texture_mirror_clamp...
2014 Dec 31
0
[PATCH] nv50,nvc0: set vertex id base to index_bias
...s;
}
diff --git a/src/gallium/drivers/nouveau/nvc0/mme/com9097.mme b/src/gallium/drivers/nouveau/nvc0/mme/com9097.mme
index 07e4519..b2060d1 100644
--- a/src/gallium/drivers/nouveau/nvc0/mme/com9097.mme
+++ b/src/gallium/drivers/nouveau/nvc0/mme/com9097.mme
@@ -227,6 +227,7 @@ locn_0f_ts:
/* NVC0_3D_MACRO_DRAW_ELEMENTS_INDIRECT
*
* NOTE: Saves and restores VB_ELEMENT,INSTANCE_BASE.
+ * Forcefully sets VERTEX_ID_BASE to the value of VB_ELEMENT_BASE.
*
* arg = mode
* parm[0] = count
@@ -247,6 +248,8 @@ locn_0f_ts:
maddr 0x150d /* VB_ELEMENT,INSTANCE_BASE */
send $r4
sen...
2016 Oct 16
2
[PATCH] exa: add GM10x acceleration support
...v->chipset < 0x110) {
class = 0xa197;
handle = 0x0000906e;
+ } else {
+ class = 0xb097;
+ handle = 0x0000906e;
}
ret = nouveau_object_new(pNv->channel, class, class,
@@ -304,10 +317,12 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn)
PUSH_DATA (push, 1);
}
- BEGIN_NVC0(push, NVC0_3D(VERTEX_QUARANTINE_ADDRESS_HIGH), 3);
- PUSH_DATA (push, (bo->offset + MISC_OFFSET) >> 32);
- PUSH_DATA (push, (bo->offset + MISC_OFFSET));
- PUSH_DATA (push, 1);
+ if (pNv->Architecture < NV_MAXWELL) {
+ BEGIN_NVC0(push, NVC0_3D(VERTEX_QUARANTINE_ADDRESS_HIGH), 3);
+ PUSH_DATA (...
2016 Oct 27
0
[PATCH v2 1/7] exa: add GM10x acceleration support
...v->chipset < 0x110) {
class = 0xa197;
handle = 0x0000906e;
+ } else {
+ class = 0xb097;
+ handle = 0x0000906e;
}
ret = nouveau_object_new(pNv->channel, class, class,
@@ -304,10 +317,12 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn)
PUSH_DATA (push, 1);
}
- BEGIN_NVC0(push, NVC0_3D(VERTEX_QUARANTINE_ADDRESS_HIGH), 3);
- PUSH_DATA (push, (bo->offset + MISC_OFFSET) >> 32);
- PUSH_DATA (push, (bo->offset + MISC_OFFSET));
- PUSH_DATA (push, 1);
+ if (pNv->Architecture < NV_MAXWELL) {
+ BEGIN_NVC0(push, NVC0_3D(VERTEX_QUARANTINE_ADDRESS_HIGH), 3);
+ PUSH_DATA (...
2016 Oct 17
0
[PATCH] exa: add GM10x acceleration support
...handle = 0x0000906e;
> + } else {
> + class = 0xb097;
> + handle = 0x0000906e;
> }
>
> ret = nouveau_object_new(pNv->channel, class, class,
> @@ -304,10 +317,12 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn)
> PUSH_DATA (push, 1);
> }
>
> - BEGIN_NVC0(push, NVC0_3D(VERTEX_QUARANTINE_ADDRESS_HIGH), 3);
> - PUSH_DATA (push, (bo->offset + MISC_OFFSET) >> 32);
> - PUSH_DATA (push, (bo->offset + MISC_OFFSET));
> - PUSH_DATA (push, 1);
> + if (pNv->Architecture < NV_MAXWELL) {
> + BEGIN_NVC0(push, NVC0_3D(VERTEX_QUARANTINE_ADDRESS_...
2014 Jan 15
3
[PATCH] nv50, nvc0: don't crash on a null cbuf
...res;
+ struct nouveau_bo *bo;
+
+ /* Do we need to clear the old RT settings? */
+ if (!fb->cbufs[i])
+ continue;
+
+ sf = nv50_surface(fb->cbufs[i]);
+ res = nv04_resource(sf->base.texture);
+ bo = res->bo;
BEGIN_NVC0(push, NVC0_3D(RT_ADDRESS_HIGH(i)), 9);
PUSH_DATAh(push, res->address + sf->offset);
--
1.8.3.2
2014 Jan 23
2
[Mesa-dev] [PATCH] nv50, nvc0: only clear out the buffers that we were asked to clear
...au/nvc0/nvc0_surface.c
>> @@ -427,9 +427,6 @@ nvc0_clear(struct pipe_context *pipe, unsigned buffers,
>> PUSH_DATAf(push, color->f[1]);
>> PUSH_DATAf(push, color->f[2]);
>> PUSH_DATAf(push, color->f[3]);
>> - mode =
>> - NVC0_3D_CLEAR_BUFFERS_R | NVC0_3D_CLEAR_BUFFERS_G |
>> - NVC0_3D_CLEAR_BUFFERS_B | NVC0_3D_CLEAR_BUFFERS_A;
>> }
>>
>> if (buffers & PIPE_CLEAR_DEPTH) {
>> @@ -444,12 +441,16 @@ nvc0_clear(struct pipe_context *pipe, unsigned buffers,
>> mode |=...
2014 Mar 06
0
[PATCH] nv50, nvc0: adjust blit_3d handling of ms output textures
...+ y1 = y0 + y_output * y_range;
x0 *= (float)(1 << nv50_miptree(src)->ms_x);
x1 *= (float)(1 << nv50_miptree(src)->ms_x);
@@ -953,7 +957,7 @@ nvc0_blit_3d(struct nvc0_context *nvc0, const struct pipe_blit_info *info)
PUSH_DATAf(push, z);
BEGIN_NVC0(push, NVC0_3D(VTX_ATTR_DEFINE), 3);
PUSH_DATA (push, 0x74200);
- PUSH_DATAf(push, 16384 << nv50_miptree(dst)->ms_x);
+ PUSH_DATAf(push, x_output);
PUSH_DATAf(push, 0.0f);
BEGIN_NVC0(push, NVC0_3D(VTX_ATTR_DEFINE), 4);
PUSH_DATA (push, 0x74301);
@@ -963,7 +967,7 @@ n...
2016 Oct 27
11
[PATCH v2 0/7] Add Maxwell support
...sary for GM20x based on testing results. I believe
now it should actually work for all GM10x and GM20x. Further, GP10x should
be very easy to add, but without someone to actually test I didn't want to
claim support for it.
Ilia Mirkin (7):
exa: add GM10x acceleration support
hwdefs: update nvc0_3d, add gm107_texture for new TIC format
nvc0: make use of the new hwdefs for TEX_CB_INDEX
nvc0: rename BEGIN_IMC0 to IMMED_NVC0
nvc0: refactor TIC uploads to allow different specifics per generation
copy: add maxwell/pascal copy engine classes
recognize and accelerate GM20x
src/Makefile.a...