search for: nvbios_rd32

...ype = NVBIOS_VOLT_GPIO; - info->vidmask = nvbios_rd08(bios, volt + 0x04); + info->type = NVBIOS_VOLT_GPIO; + info->vidmask = nvbios_rd08(bios, volt + 0x04); + info->entry_based = true; break; case 0x40: - info->type = NVBIOS_VOLT_GPIO; - info->base = nvbios_rd32(bios, volt + 0x04); - info->step = nvbios_rd16(bios, volt + 0x08); - info->vidmask = nvbios_rd08(bios, volt + 0x0b); + info->type = NVBIOS_VOLT_GPIO; + info->base = nvbios_rd32(bios, volt + 0x04); + info->step = nvbios_rd16(bios, volt + 0x08); + info-&gt...

...truct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, > + u8 *len) > +{ > + struct bit_entry bit_P; > + u32 power_budget; > + > + if (bit_entry(bios, 'P', &bit_P) || bit_P.version != 2 || > + bit_P.length < 0x2c) > + return 0; > + > + power_budget = nvbios_rd32(bios, bit_P.offset + 0x2c); > + if (!power_budget) > + return 0; > + > + *ver = nvbios_rd08(bios, power_budget); > + switch (*ver) { > + case 0x10: > + case 0x20: > + case 0x30: > + *hdr = nvbios_rd08(bios, power_budget + 0x1); > + *len = nvbios_rd08(bios, power_bud...

...truct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, > + u8 *len) > +{ > + struct bit_entry bit_P; > + u32 power_budget; > + > + if (bit_entry(bios, 'P', &bit_P) || bit_P.version != 2 || > + bit_P.length < 0x2c) > + return 0; > + > + power_budget = nvbios_rd32(bios, bit_P.offset + 0x2c); > + if (!power_budget) > + return 0; > + > + *ver = nvbios_rd08(bios, power_budget); > + switch (*ver) { > + case 0x10: > + case 0x20: > + case 0x30: > + *hdr = nvbios_rd08(bios, power_budget + 0x1); > + *len = nvbios_rd08(bios, power_bud...

On a very few GPUs with the voltage table version 0x50 we have to read out the VIDs out of the entries of the table, where all the other gpus are either PWM based or get a base and a step voltage out of the table header. Currently nouveau tried to autodetect this and actually doesn't parse the entries. This Series adds two things: 1. It parses the entries 2. It decides upon a field in the

...truct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, > + u8 *len) > +{ > + struct bit_entry bit_P; > + u32 power_budget; > + > + if (bit_entry(bios, 'P', &bit_P) || bit_P.version != 2 || > + bit_P.length < 0x2c) > + return 0; > + > + power_budget = nvbios_rd32(bios, bit_P.offset + 0x2c); > + if (!power_budget) > + return 0; > + > + *ver = nvbios_rd08(bios, power_budget); > + switch (*ver) { > + case 0x10: > + case 0x20: > + case 0x30: > + *hdr = nvbios_rd08(bios, power_budget + 0x1); > + *len = nvbios_rd08(bios, power_bud...

...struct bit_entry bit_P; >>> + u32 power_budget; >>> + >>> + if (bit_entry(bios, 'P', &bit_P) || bit_P.version != 2 || >>> + bit_P.length < 0x2c) >>> + return 0; >>> + >>> + power_budget = nvbios_rd32(bios, bit_P.offset + 0x2c); >>> + if (!power_budget) >>> + return 0; >>> + >>> + *ver = nvbios_rd08(bios, power_budget); >>> + switch (*ver) { >>> + case 0x10: >>> + case 0x20: >>> + case 0x3...

...t.h> + +static u32 +nvbios_power_budget_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, + u8 *len) +{ + struct bit_entry bit_P; + u32 power_budget; + + if (bit_entry(bios, 'P', &bit_P) || bit_P.version != 2 || + bit_P.length < 0x2c) + return 0; + + power_budget = nvbios_rd32(bios, bit_P.offset + 0x2c); + if (!power_budget) + return 0; + + *ver = nvbios_rd08(bios, power_budget); + switch (*ver) { + case 0x10: + case 0x20: + case 0x30: + *hdr = nvbios_rd08(bios, power_budget + 0x1); + *len = nvbios_rd08(bios, power_budget + 0x2); + *cnt = nvbios_rd08(bios, power_budg...

There is an optinal header field in the power budget table we can use to read out the power cap of the GPU. We should have this in the kernel before actually using it to catch errors and see how reliable this is, but as it seems it works on all GPUs as expected on Kepler und Maxwells with the power cap field set in the vbios. This series keeps things really simple for now until we figure out

There is an optinal header field in the power budget table we can use to read out the power cap of the GPU. We should have this in the kernel before actually using it to catch errors and see how reliable this is, but as it seems it works on all GPUs as expected on Kepler und Maxwells with the power cap field set in the vbios. This series keeps things really simple for now until we figure out

...t.h> + +static u32 +nvbios_power_budget_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, + u8 *len) +{ + struct bit_entry bit_P; + u32 power_budget; + + if (bit_entry(bios, 'P', &bit_P) || bit_P.version != 2 || + bit_P.length < 0x2c) + return 0; + + power_budget = nvbios_rd32(bios, bit_P.offset + 0x2c); + if (!power_budget) + return 0; + + *ver = nvbios_rd08(bios, power_budget); + switch (*ver) { + case 0x10: + case 0x20: + case 0x30: + *hdr = nvbios_rd08(bios, power_budget + 0x1); + *len = nvbios_rd08(bios, power_budget + 0x2); + *cnt = nvbios_rd08(bios, power_budg...

...t.h> + +static u32 +nvbios_power_budget_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, + u8 *len) +{ + struct bit_entry bit_P; + u32 power_budget; + + if (bit_entry(bios, 'P', &bit_P) || bit_P.version != 2 || + bit_P.length < 0x2c) + return 0; + + power_budget = nvbios_rd32(bios, bit_P.offset + 0x2c); + if (!power_budget) + return 0; + + *ver = nvbios_rd08(bios, power_budget); + switch (*ver) { + case 0x10: + case 0x20: + case 0x30: + *hdr = nvbios_rd08(bios, power_budget + 0x1); + *len = nvbios_rd08(bios, power_budget + 0x2); + *cnt = nvbios_rd08(bios, power_budg...

...a/drm/nouveau/nvkm/subdev/bios/volt.c +++ b/drm/nouveau/nvkm/subdev/bios/volt.c @@ -96,6 +96,8 @@ nvbios_volt_parse(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len, info->min = min(info->base, info->base + info->step * info->vidmask); info->max = nvbios_rd32(bios, volt + 0x0e); + if (!info->max) + info->max = max(info->base, info->base + info->step * info->vidmask); break; case 0x50: info->min = nvbios_rd32(bios, volt + 0x0a); -- 2.21.0

...n) >> +{ >> + struct bit_entry bit_P; >> + u32 power_budget; >> + >> + if (bit_entry(bios, 'P', &bit_P) || bit_P.version != 2 || >> + bit_P.length < 0x2c) >> + return 0; >> + >> + power_budget = nvbios_rd32(bios, bit_P.offset + 0x2c); >> + if (!power_budget) >> + return 0; >> + >> + *ver = nvbios_rd08(bios, power_budget); >> + switch (*ver) { >> + case 0x10: >> + case 0x20: >> + case 0x30: >> + *hdr =...

There is an optinal header field in the power budget table we can use to read out the power cap of the GPU. Sadly it is optional and if that field isn't sad, things beome complicated. Anyhow, this is good enough for most cards and we can use it later for capping the power consumption of the GPUs, but first, just export those values through hwmon. First design, will change stuff, want

...nouveau/nvkm/subdev/bios/vmap.c b/drm/nouveau/nvkm/subdev/bios/vmap.c index f2295e1..32bd8b1 100644 --- a/drm/nouveau/nvkm/subdev/bios/vmap.c +++ b/drm/nouveau/nvkm/subdev/bios/vmap.c @@ -105,7 +105,7 @@ nvbios_vmap_entry_parse(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len, info->arg[2] = nvbios_rd32(bios, vmap + 0x10); break; case 0x20: - info->unk0 = nvbios_rd08(bios, vmap + 0x00); + info->mode = nvbios_rd08(bios, vmap + 0x00); info->link = nvbios_rd08(bios, vmap + 0x01); info->min = nvbios_rd32(bios, vmap + 0x02); info->max = nvbios_rd32(bios, vmap...

There is an optinal header field in the power budget table we can use to read out the power cap of the GPU. The meaning of this header field was confirmed with nvidia-smi -q: The rows "Min Power Limit", "Power Limit" and "Max Power Limit" are set to the "min", "avg" and "max" values from the referenced power budget entry respectively.

This series fixes most of the issues regarding volting on GPUs with any form of GPU Boost inside their vbios, which is mainly Kepler and newer, but we find some boosting related tables in Fermi vbios' already In the end reclocking should work on most Kepler cards without any issues Karol Herbst (19): bios/volt: handle voltage table version 0x50 with 0ed header volt: properly detect entry

...veau/nvkm/subdev/bios/volt.c +++ b/drm/nouveau/nvkm/subdev/bios/volt.c @@ -142,7 +142,10 @@ nvbios_volt_entry_parse(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len, info->vid = nvbios_rd08(bios, volt + 0x01) >> 2; break; case 0x40: + break; case 0x50: + info->voltage = nvbios_rd32(bios, volt) & 0x001fffff; + info->vid = (nvbios_rd32(bios, volt) >> 23) & 0xff; break; } return volt; -- 2.7.3

...veau/nvkm/subdev/bios/volt.c +++ b/drm/nouveau/nvkm/subdev/bios/volt.c @@ -142,7 +142,10 @@ nvbios_volt_entry_parse(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len, info->vid = nvbios_rd08(bios, volt + 0x01) >> 2; break; case 0x40: + break; case 0x50: + info->voltage = nvbios_rd32(bios, volt) & 0x001fffff; + info->vid = (nvbios_rd32(bios, volt) >> 23) & 0xff; break; } return volt; -- 2.8.1

...veau/nvkm/subdev/bios/volt.c +++ b/drm/nouveau/nvkm/subdev/bios/volt.c @@ -142,7 +142,10 @@ nvbios_volt_entry_parse(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len, info->vid = nvbios_rd08(bios, volt + 0x01) >> 2; break; case 0x40: + break; case 0x50: + info->voltage = nvbios_rd32(bios, volt) & 0x001fffff; + info->vid = (nvbios_rd32(bios, volt) >> 23) & 0xff; break; } return volt; -- 2.8.1