Displaying 3 results from an estimated 3 matches for "nvaccelinitcopy_nve0".
2016 Oct 27
1
[PATCH v2 6/7] copy: add maxwell/pascal copy engine classes
...0xa0b5, 0, nouveau_copya0b5_init },
> { 0x90b8, 5, nouveau_copy90b5_init },
> { 0x90b5, 4, nouveau_copy90b5_init },
> diff --git a/src/nvc0_accel.c b/src/nvc0_accel.c
> index 8da5051..d0a835e 100644
> --- a/src/nvc0_accel.c
> +++ b/src/nvc0_accel.c
> @@ -156,9 +156,17 @@ NVAccelInitCOPY_NVE0(ScrnInfoPtr pScrn)
> {
> NVPtr pNv = NVPTR(pScrn);
> struct nouveau_pushbuf *push = pNv->pushbuf;
> + uint32_t class;
> int ret;
>
> - ret = nouveau_object_new(pNv->channel, 0x0000a0b5, 0xa0b5,
> + if (pNv->dev->chipset < 0x110)
> + class = 0xa0b5;...
2016 Oct 27
0
[PATCH v2 6/7] copy: add maxwell/pascal copy engine classes
...5, 0, nouveau_copya0b5_init },
{ 0xa0b5, 0, nouveau_copya0b5_init },
{ 0x90b8, 5, nouveau_copy90b5_init },
{ 0x90b5, 4, nouveau_copy90b5_init },
diff --git a/src/nvc0_accel.c b/src/nvc0_accel.c
index 8da5051..d0a835e 100644
--- a/src/nvc0_accel.c
+++ b/src/nvc0_accel.c
@@ -156,9 +156,17 @@ NVAccelInitCOPY_NVE0(ScrnInfoPtr pScrn)
{
NVPtr pNv = NVPTR(pScrn);
struct nouveau_pushbuf *push = pNv->pushbuf;
+ uint32_t class;
int ret;
- ret = nouveau_object_new(pNv->channel, 0x0000a0b5, 0xa0b5,
+ if (pNv->dev->chipset < 0x110)
+ class = 0xa0b5;
+ else if (pNv->dev->chipset < 0x1...
2016 Oct 27
11
[PATCH v2 0/7] Add Maxwell support
I believe I've addressed all the feedback from the first time around, and
also made fixes necessary for GM20x based on testing results. I believe
now it should actually work for all GM10x and GM20x. Further, GP10x should
be very easy to add, but without someone to actually test I didn't want to
claim support for it.
Ilia Mirkin (7):
exa: add GM10x acceleration support
hwdefs: update