Displaying 6 results from an estimated 6 matches for "nvaa_clock_tidi".
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nvaa_clock_tidy
2013 Dec 06
2
Regression: drm/nouveau/clk: implement power state and engine clock control in core (7c856522069755ab9d163a24ac332cd3cb35fe30) breaks GeForce 9400 on Intel Mac Mini Model November 2010 model
Hello Ilia,
> > [ 7.569394] nouveau [ DEVICE][0000:02:00.0] BOOT0 : 0x0ac080b1
> > [ 7.569460] nouveau [ DEVICE][0000:02:00.0] Chipset: MCP79/MCP7A (NVAC)
> > [ 7.569530] nouveau [ DEVICE][0000:02:00.0] Family : NV50
> > [ 7.571151] nouveau [ VBIOS][0000:02:00.0] checking PRAMIN for image...
> > [ 7.633082] nouveau [ VBIOS][0000:02:00.0]
2013 Dec 06
0
Regression: drm/nouveau/clk: implement power state and engine clock control in core (7c856522069755ab9d163a24ac332cd3cb35fe30) breaks GeForce 9400 on Intel Mac Mini Model November 2010 model
On Fri, Dec 6, 2013 at 8:30 AM, Thomas Glanzmann <thomas at glanzmann.de> wrote:
> Hello Ilia,
>
>> > [ 7.569394] nouveau [ DEVICE][0000:02:00.0] BOOT0 : 0x0ac080b1
>> > [ 7.569460] nouveau [ DEVICE][0000:02:00.0] Chipset: MCP79/MCP7A (NVAC)
>> > [ 7.569530] nouveau [ DEVICE][0000:02:00.0] Family : NV50
>> > [ 7.571151] nouveau [
2013 Nov 16
0
[PATCH] drm/nouveau/clk: Implement reclocking for NVAA/NVAC
v2: Check for PFIFO, don't pause if it's not yet running. This should fix reclocking on boot
Signed-off-by: Roy Spliet <rspliet at eclipso.eu>
---
drivers/gpu/drm/nouveau/Makefile | 1 +
drivers/gpu/drm/nouveau/core/engine/device/nv50.c | 4 +-
.../gpu/drm/nouveau/core/include/subdev/clock.h | 4 +
drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c | 439
2013 Nov 17
0
[PATCH] drm/nouveau/clk: Implement reclocking for NVAA/NVAC
v2: Check for PFIFO, don't pause if it's not yet running. This should fix reclocking on boot
v3: Tiny clean up
Signed-off-by: Roy Spliet <rspliet at eclipso.eu>
---
drivers/gpu/drm/nouveau/Makefile | 1 +
drivers/gpu/drm/nouveau/core/engine/device/nv50.c | 4 +-
.../gpu/drm/nouveau/core/include/subdev/clock.h | 4 +
2013 Nov 09
2
[PATCH] drm/nouveau/clk: Initial implementation for reclocking NVAA/NVAC
Reclocking of NVAA/NVAC is substantially different from NV50+, enough to justify a separate clock implementation. This code is a forward-port of reclocking code that has been sitting in a branch for a while, and has been tested on my NVAC. Traces show no significant reasons why this shouldn't work on NVAA, but testers are always welcome. And since these are IGPs without dedicated RAM to
2013 Dec 06
2
Regression: drm/nouveau/clk: implement power state and engine clock control in core (7c856522069755ab9d163a24ac332cd3cb35fe30) breaks GeForce 9400 on Intel Mac Mini Model November 2010 model
Hello everyone,
the current git HEAD of Linus Torvalds tree breaks Nouveau on my Mac Mini
Model 2010. I get variation of the following kernel panic when booting.
(gateway) [~] nc -u -l -p 6666
[ 3.796018] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 3.796100] ata2: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
[ 3.796304] ata1.00: ATA-7: INTEL SSDSA2M160G2GC, 2CV102HA, max