Displaying 11 results from an estimated 11 matches for "nvaa_clock_prog".
2014 Aug 23
2
RESEND NVA3 clock tree improvements
Resend of patch #7 to fix behaviour when failing to pause parts of the GPU
2014 Aug 21
0
[PATCH 7/7] clock/nva3: Pause the GPU before reclocking
...turn 0;
}
diff --git a/drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c b/drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c
index 6a65fc9..fa91d2a 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c
@@ -299,25 +299,13 @@ static int
nvaa_clock_prog(struct nouveau_clock *clk)
{
struct nvaa_clock_priv *priv = (void *)clk;
- struct nouveau_fifo *pfifo = nouveau_fifo(clk);
+ u32 pllmask = 0, mast;
unsigned long flags;
- u32 pllmask = 0, mast, ptherm_gate;
- int ret = -EBUSY;
-
- /* halt and idle execution engines */
- ptherm_gate = nv_mask(c...
2014 Aug 29
1
RESENT NVA3 clock tree improvements
Re-resend of patch #7 to move the _post and _pre function prototypes to nva3.h
2014 Aug 23
0
[PATCH] clock/nva3: Pause the GPU before reclocking
...static void
diff --git a/drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c b/drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c
index 6a65fc9..769ab26 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c
@@ -299,25 +299,14 @@ static int
nvaa_clock_prog(struct nouveau_clock *clk)
{
struct nvaa_clock_priv *priv = (void *)clk;
- struct nouveau_fifo *pfifo = nouveau_fifo(clk);
+ u32 pllmask = 0, mast;
unsigned long flags;
- u32 pllmask = 0, mast, ptherm_gate;
- int ret = -EBUSY;
-
- /* halt and idle execution engines */
- ptherm_gate = nv_mask(c...
2013 Dec 06
2
Regression: drm/nouveau/clk: implement power state and engine clock control in core (7c856522069755ab9d163a24ac332cd3cb35fe30) breaks GeForce 9400 on Intel Mac Mini Model November 2010 model
...pu/drm/nouveau/core/subdev/clock/nvaa.c:646:1: error: redefinition of 'nvaa_clock_calc'
drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:201:1: note: previous definition of 'nvaa_clock_calc' was here
drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:744:1: error: redefinition of 'nvaa_clock_prog'
drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:299:1: note: previous definition of 'nvaa_clock_prog' was here
drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:847:1: error: redefinition of 'nvaa_clock_tidy'
drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:402:1: note: previou...
2013 Dec 06
0
Regression: drm/nouveau/clk: implement power state and engine clock control in core (7c856522069755ab9d163a24ac332cd3cb35fe30) breaks GeForce 9400 on Intel Mac Mini Model November 2010 model
...veau/core/subdev/clock/nvaa.c:646:1: error: redefinition of 'nvaa_clock_calc'
> drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:201:1: note: previous definition of 'nvaa_clock_calc' was here
> drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:744:1: error: redefinition of 'nvaa_clock_prog'
> drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:299:1: note: previous definition of 'nvaa_clock_prog' was here
> drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:847:1: error: redefinition of 'nvaa_clock_tidy'
> drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.c:402:1...
2014 Aug 21
9
NVA3 clock tree improvements
Following a series of patches to improve nouveaus clock tree parsing. Reclocking these engines (all but memory) is pretty stable on the cards I've tested. Please review and merge when approved.
These patches do not solve the problem that core/shader engine doesn't like to be clocked up too far without fb following, with visible corruption as a result. I suspect this problem is unrelated
2013 Nov 16
0
[PATCH] drm/nouveau/clk: Implement reclocking for NVAA/NVAC
...rc == nv_clk_src_core)
+ nv_debug(priv, "shader: nvpll\n");
+ else
+ nv_debug(priv, "shader: spll\n");
+
+ if (priv->vsrc == nv_clk_src_hclkm4)
+ nv_debug(priv, "vdec: 500MHz\n");
+ else
+ nv_debug(priv, "vdec: core\n");
+
+ return 0;
+}
+
+static int
+nvaa_clock_prog(struct nouveau_clock *clk)
+{
+ struct nvaa_clock_priv *priv = (void *)clk;
+ struct nouveau_fifo *pfifo = nouveau_fifo(clk);
+ unsigned long flags;
+ u32 pllmask = 0, mast, ptherm_gate;
+ int ret = -EBUSY;
+
+ /* halt and idle execution engines */
+ ptherm_gate = nv_mask(clk, 0x020060, 0x00070000,...
2013 Nov 17
0
[PATCH] drm/nouveau/clk: Implement reclocking for NVAA/NVAC
...rc == nv_clk_src_core)
+ nv_debug(priv, "shader: nvpll\n");
+ else
+ nv_debug(priv, "shader: spll\n");
+
+ if (priv->vsrc == nv_clk_src_hclkm4)
+ nv_debug(priv, "vdec: 500MHz\n");
+ else
+ nv_debug(priv, "vdec: core\n");
+
+ return 0;
+}
+
+static int
+nvaa_clock_prog(struct nouveau_clock *clk)
+{
+ struct nvaa_clock_priv *priv = (void *)clk;
+ struct nouveau_fifo *pfifo = nouveau_fifo(clk);
+ unsigned long flags;
+ u32 pllmask = 0, mast, ptherm_gate;
+ int ret = -EBUSY;
+
+ /* halt and idle execution engines */
+ ptherm_gate = nv_mask(clk, 0x020060, 0x00070000,...
2013 Nov 09
2
[PATCH] drm/nouveau/clk: Initial implementation for reclocking NVAA/NVAC
Reclocking of NVAA/NVAC is substantially different from NV50+, enough to justify a separate clock implementation. This code is a forward-port of reclocking code that has been sitting in a branch for a while, and has been tested on my NVAC. Traces show no significant reasons why this shouldn't work on NVAA, but testers are always welcome. And since these are IGPs without dedicated RAM to
2013 Dec 06
2
Regression: drm/nouveau/clk: implement power state and engine clock control in core (7c856522069755ab9d163a24ac332cd3cb35fe30) breaks GeForce 9400 on Intel Mac Mini Model November 2010 model
Hello everyone,
the current git HEAD of Linus Torvalds tree breaks Nouveau on my Mac Mini
Model 2010. I get variation of the following kernel panic when booting.
(gateway) [~] nc -u -l -p 6666
[ 3.796018] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
[ 3.796100] ata2: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
[ 3.796304] ata1.00: ATA-7: INTEL SSDSA2M160G2GC, 2CV102HA, max