Displaying 8 results from an estimated 8 matches for "nva3_clock_info".
2014 Aug 21
0
[PATCH 2/7] clock/nva3: Set PLL refclk
...lock/nva3.c b/drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c
index a08011c..b9ab90a 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c
@@ -163,17 +163,12 @@ nva3_clock_read(struct nouveau_clock *clk, enum nv_clk_src src)
}
int
-nva3_clock_info(struct nouveau_clock *clock, int clk, u32 pll, u32 khz,
+nva3_clk_info(struct nouveau_clock *clock, int clk, u32 khz,
struct nva3_clock_info *info)
{
- struct nouveau_bios *bios = nouveau_bios(clock);
struct nva3_clock_priv *priv = (void *)clock;
- struct nvbios_pll limits;
- u32 oclk, sclk,...
2014 Aug 21
9
NVA3 clock tree improvements
Following a series of patches to improve nouveaus clock tree parsing. Reclocking these engines (all but memory) is pretty stable on the cards I've tested. Please review and merge when approved.
These patches do not solve the problem that core/shader engine doesn't like to be clocked up too far without fb following, with visible corruption as a result. I suspect this problem is unrelated
2014 Aug 29
1
RESENT NVA3 clock tree improvements
Re-resend of patch #7 to move the _post and _pre function prototypes to nva3.h
2014 Aug 23
2
RESEND NVA3 clock tree improvements
Resend of patch #7 to fix behaviour when failing to pause parts of the GPU
2014 Aug 21
0
[PATCH 7/7] clock/nva3: Pause the GPU before reclocking
...+ nv_mask(clk, 0x002504, 0x00000001, 0x00000000);
+ nv_mask(clk, 0x020060, 0x00070000, 0x00040000);
+}
+
static void
disable_clk_src(struct nva3_clock_priv *priv, u32 src)
{
@@ -421,6 +457,12 @@ nva3_clock_prog(struct nouveau_clock *clk)
{
struct nva3_clock_priv *priv = (void *)clk;
struct nva3_clock_info *core = &priv->eng[nv_clk_src_core];
+ int ret;
+ unsigned long flags;
+
+ ret = nva3_clock_pre(clk, &flags);
+ if (ret)
+ return ret;
if (core->pll)
prog_core(priv, nv_clk_src_core_intm);
@@ -430,6 +472,9 @@ nva3_clock_prog(struct nouveau_clock *clk)
prog_clk(priv, 0x20, nv...
2014 Aug 23
0
[PATCH] clock/nva3: Pause the GPU before reclocking
...+ nv_mask(clk, 0x002504, 0x00000001, 0x00000000);
+ nv_mask(clk, 0x020060, 0x00070000, 0x00040000);
+}
+
static void
disable_clk_src(struct nva3_clock_priv *priv, u32 src)
{
@@ -421,6 +457,13 @@ nva3_clock_prog(struct nouveau_clock *clk)
{
struct nva3_clock_priv *priv = (void *)clk;
struct nva3_clock_info *core = &priv->eng[nv_clk_src_core];
+ int ret = 0;
+ unsigned long flags;
+ unsigned long *f = &flags;
+
+ ret = nva3_clock_pre(clk, f);
+ if (ret)
+ goto out;
if (core->pll)
prog_core(priv, nv_clk_src_core_intm);
@@ -430,7 +473,14 @@ nva3_clock_prog(struct nouveau_clock *clk...
2014 Sep 29
18
Implement reclocking for DDR2, DDR3, GDDR3
Following a series of patches that implement memory reclocking for NVA3/5/8 with
DDR2, DDR3 and GDDR3 on board. I tested these patches on 6 different graphics
cards, but I expect reclocking now to work on many more.
Testers can pick up these patches and test it by enabling pstate
(nouveau.pstate=1). They should then be able to change clocks by writing to
/sys/class/drm/card0/device/pstate. Correct
2014 Sep 12
6
NVA3: Small misc mem reclocking fixes
Patch 1 fixes nva3 bailing due to not finding the right ramcfg
Patch 2 is a resend rebased on 3.17.0-rc4 for setting the vblank period
Patch 3-5 handle writes to per-partition registers, for which NVA3 does not
have special broadcast regs available.
Patch 6 removes local structs from NVA3 reclocking in favour of the already
existing "ram->base." variables, like in NVE0
As always,