search for: nv_tile_gob_size

...include "nouveau_bo.h" #include "nouveau_gem.h" @@ -577,6 +582,125 @@ nv50_wndw_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state) return 0; } +#define NV_TILE_BLK_BASE_HEIGHT_TESLA 4 /* In pixel */ +#define NV_TILE_BLK_BASE_HEIGHT 8 /* In pixel */ +#define NV_TILE_GOB_SIZE 64 /* In bytes */ +#define NV_TILE_BLK_WIDTH (NV_TILE_GOB_SIZE / 4) /* For 32 bits pixel */ + +/* Only used by drm_panic get_scanout_buffer() and set_pixel(), so it is + * protected by the drm panic spinlock + */ +static u32 nv50_panic_blk_h; + +/* Return the framebuffer offset of the start of the...

...include "nouveau_gem.h" > @@ -577,6 +582,125 @@ nv50_wndw_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state) > return 0; > } > > +#define NV_TILE_BLK_BASE_HEIGHT_TESLA 4 /* In pixel */ > +#define NV_TILE_BLK_BASE_HEIGHT 8 /* In pixel */ > +#define NV_TILE_GOB_SIZE 64 /* In bytes */ > +#define NV_TILE_BLK_WIDTH (NV_TILE_GOB_SIZE / 4) /* For 32 bits pixel */ This was a bit confusing to look at so I had to go and review how some of this works. I think it might be better to name this something like: NV_TILE_GOB_WIDTH_BYTES Since -technically- the size of a...

...t; >> @@ -577,6 +582,125 @@ nv50_wndw_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state) >> return 0; >> } >> >> +#define NV_TILE_BLK_BASE_HEIGHT_TESLA 4 /* In pixel */ >> +#define NV_TILE_BLK_BASE_HEIGHT 8 /* In pixel */ >> +#define NV_TILE_GOB_SIZE 64 /* In bytes */ >> +#define NV_TILE_BLK_WIDTH (NV_TILE_GOB_SIZE / 4) /* For 32 bits pixel */ > > This was a bit confusing to look at so I had to go and review how some of this > works. I think it might be better to name this something like: > > NV_TILE_GOB_WIDTH_BYTES >...

This series adds basic drm_panic support for nouveau. Patches 1-2 Add missing bits in drm_panic (ABGR2101010, private data for set_pixel()) Patch 3 registers nouveau to drm_panic, and handle tiling. I've tested on a GTX1650, while running Gnome/Wayland desktop. It should work on other nv50+ cards, but I didn't test them. To test it, you need to build your kernel with CONFIG_DRM_PANIC=y,

This series adds basic drm_panic support for nouveau. Patches 1 Add ABGR2101010 support in drm_panic. Patch 2 registers nouveau to drm_panic, and handle tiling. I've tested on a GTX1650 (Turing) and GF 8800 GT (Tesla), while running Gnome/Wayland desktop, and in VT. It should work on other nv50+ cards, but I didn't test them. To test it, you need to build your kernel with