search for: nv_ppwr_counter_sig_pcie

Displaying 5 results from an estimated 5 matches for "nv_ppwr_counter_sig_pcie".

2015 Oct 26
0
[PATCH 2/4] pmu/fuc: add macros for pdaemon pwr counters
...C 0x00020000 +#define NV_PPWR_COUNTER_SIG_PCOPY0_IDLE 0x00080000 +#define NV_PPWR_COUNTER_SIG_PCOPY1_IDLE 0x00100000 +#define NV_PPWR_COUNTER_SIG_PCOPY2_IDLE 0x00200000 +#define NV_PPWR_COUNTER_SIG_PCIE 0x20000000 #if NVKM_PPWR_CHIPSET < GK208 #define NV_PPWR_DSCRATCH(i) (4 * (i) + 0x05d0) #endif -- 2.6.2
2015 Oct 26
9
[PATCH 0/4] Add pdaemon load counters
this series makes use of the load counters we can use to get information about the current load of the gpu. This series includes the needed pmu bits and a debugfs interface to read them out. Currently the values are between 0 and 255, because it is much easier to implement it this way on the pmu. Karol Herbst (4): subdev/pmu/fuc: add gk104 pmu/fuc: add macros for pdaemon pwr counters
2016 Feb 08
4
[PATCH 0/4] PMU engine counters
these are usually used for dynamic reclocking on gt215 and newer The counters are used to get the load of the core, memory, video and pcie loads currently I expose the loads through a debugfs "current_load" file, but I want to move that to nvif and just add a wrapper around that in debugfs for convenience Anyway there are still some issues I would like to discuss: 1. currently the
2016 Feb 16
4
[PATCH v2 0/4] PMU engine counters
these are usually used for dynamic reclocking on gt215 and newer The counters are used to get the load of the core, memory, video and pcie loads currently I expose the loads through a debugfs "current_load" file, but I want to move that to nvif and just add a wrapper around that in debugfs for convenience. Using nvif would have the advantage, that userspace tools can easily get loads
2015 Oct 26
0
[PATCH 3/4] subdev/pmu/fuc: implement perf
...SK(2), $r14) + + // memory load counter + imm32($r14, +#if NVKM_PPWR_CHIPSET >= GF100 + NV_PPWR_COUNTER_SIG_BFB_PART0_REQ +#else + NV_PPWR_COUNTER_SIG_FB_PART0_REQ +#endif + ) + nv_iowr(NV_PPWR_COUNTER_MASK(3), $r14) + + // pcie load counter +#if NVKM_PPWR_CHIPSET >= GF100 + imm32($r14, NV_PPWR_COUNTER_SIG_PCIE) + nv_iowr(NV_PPWR_COUNTER_MASK(4), $r14) +#endif + + // initial read out + call(perf_counter_readout) + + // schedule the next read out + ld(b32, $r14, #perf_polling_period_us) + call #ticks_from_us + call(timer) + ret #endif -- 2.6.2