Displaying 6 results from an estimated 6 matches for "nv_ppwr_counter_mode_if_not_all".
2015 Oct 26
0
[PATCH 2/4] pmu/fuc: add macros for pdaemon pwr counters
...ET 0x80000000
+#define NV_PPWR_COUNTER_MODE(i) (0x10 * (i) + 0x050c)
+#define NV_PPWR_COUNTER_MODE_NEVER 0
+#define NV_PPWR_COUNTER_MODE_IF_ALL 1
+#define NV_PPWR_COUNTER_MODE_IF_NOT_ALL 2
+#define NV_PPWR_COUNTER_MODE_ALWAYS 3
+#define NV_PPWR_COUNTER_SIG_GR_IDLE 0x00000001
+#define NV_PPWR_COUNTER_SIG_GR_HUB_IDLE 0x00000002
+#define NV_PPWR...
2015 Oct 26
9
[PATCH 0/4] Add pdaemon load counters
this series makes use of the load counters we can use to get information about
the current load of the gpu.
This series includes the needed pmu bits and a debugfs interface to read them
out. Currently the values are between 0 and 255, because it is much easier to
implement it this way on the pmu.
Karol Herbst (4):
subdev/pmu/fuc: add gk104
pmu/fuc: add macros for pdaemon pwr counters
2016 Feb 08
4
[PATCH 0/4] PMU engine counters
these are usually used for dynamic reclocking on gt215 and newer
The counters are used to get the load of the core, memory, video and pcie loads
currently I expose the loads through a debugfs "current_load" file, but I want
to move that to nvif and just add a wrapper around that in debugfs for
convenience
Anyway there are still some issues I would like to discuss:
1. currently the
2016 Feb 16
4
[PATCH v2 0/4] PMU engine counters
these are usually used for dynamic reclocking on gt215 and newer
The counters are used to get the load of the core, memory, video and pcie loads
currently I expose the loads through a debugfs "current_load" file, but I want
to move that to nvif and just add a wrapper around that in debugfs for
convenience. Using nvif would have the advantage, that userspace tools can
easily get loads
2015 Oct 26
0
[PATCH 3/4] subdev/pmu/fuc: implement perf
...// description
@@ -53,5 +137,69 @@ perf_recv:
// $r15 - current (perf)
// $r0 - zero
perf_init:
+ // set up the total ticks counter first
+ imm32($r14, NV_PPWR_COUNTER_MODE_ALWAYS)
+ nv_iowr(NV_PPWR_COUNTER_MODE(0), $r14)
+
+ // set up the other counters, with fermi there are more
+ imm32($r14, NV_PPWR_COUNTER_MODE_IF_NOT_ALL)
+ nv_iowr(NV_PPWR_COUNTER_MODE(1), $r14)
+ nv_iowr(NV_PPWR_COUNTER_MODE(2), $r14)
+ nv_iowr(NV_PPWR_COUNTER_MODE(3), $r14)
+#if NVKM_PPWR_CHIPSET >= GF100
+ nv_iowr(NV_PPWR_COUNTER_MODE(4), $r14)
+#endif
+
+ // core load counter
+ imm32($r14,
+ NV_PPWR_COUNTER_SIG_GR_IDLE
+ | NV_PPWR_COUNTE...
2017 May 07
6
[RFC v2 0/6] PMU engine counters
reworked this series quite a lot.
Now we want the Host to configure the counters through the PMU.
The series isn't complete though because it needs:
1. reordering
2. better commit messages
but I felt like sending those out before doing a final version.
I also found some weird register overwriting issue on the PMU I have to track
down, because it interfers with the counter read out. I am