Displaying 3 results from an estimated 3 matches for "nv_pfb_niso_poller_hostnb_base_adr".
2014 Oct 21
3
Questions about some PFB registers on NVAC cards
(Sending it to the correct Nvidia mailing list, sorry for the spam)
Hi,
When using acceleration with Nouveau on MacBook Pros with an 9400M (NVAC) card,
a PFIFO interrupt 0x00400000 is thrown during the initialisation of that card
(sometime after PFIFO and PGRAPH initialisation) and the laptop will lockup [1],
forcing users to load Nouveau without acceleration.
After some investigation, I found
2014 Dec 01
1
Questions about some PFB registers on NVAC cards
...get meaningful information from 100c90
* on traps. No idea what these values mean exactly. */
nv_wr32(priv, 0x100c90, impl->trap);
Thanks,
Pierre
> >
> > #define NV_PFB_NISO_POLLER_DNISO_BASE_ADR
> > 0x00100C18
> > #define NV_PFB_NISO_POLLER_HOSTNB_BASE_ADR
> > 0x00100C1C
> > #define NV_PFB_NISO_FLUSH_CARVEOUT_ADR
> > 0x00100C24
> >
> > Each of these should point to at least 32 bytes of otherwise-unused
> > FB
> > memory, if the poller is enabled.
> >
> > T...
2014 Nov 26
0
Questions about some PFB registers on NVAC cards
...r writing some random value seemed to have no
> effect. What is this register used for?
100c1c is one of three registers which control the (upper bits of the 32-byte
aligned) memory locations that the pollers use:
#define NV_PFB_NISO_POLLER_DNISO_BASE_ADR 0x00100C18
#define NV_PFB_NISO_POLLER_HOSTNB_BASE_ADR 0x00100C1C
#define NV_PFB_NISO_FLUSH_CARVEOUT_ADR 0x00100C24
Each of these should point to at least 32 bytes of otherwise-unused FB
memory, if the poller is enabled.
The proprietary driver enables all three pollers for GPUs that have them, when
memory is...