Displaying 20 results from an estimated 135 matches for "nv_object".
2014 May 27
2
[PATCH 1/2] nvc0: add GK20A 3D class
...;acourbot at nvidia.com> wrote:
> GK20A is mostly compatible with GK104, but features a new 3D
> class. Add it to the relevant header and use it when GK20A is
> detected.
>
> Signed-off-by: Alexandre Courbot <acourbot at nvidia.com>
> ---
> src/gallium/drivers/nouveau/nv_object.xml.h | 1 +
> src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 9 ++++++++-
> 2 files changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/nouveau/nv_object.xml.h b/src/gallium/drivers/nouveau/nv_object.xml.h
> index 4c93e6564838..0a0e187dc028 100644
>...
2014 Feb 04
1
[RFC 07/16] drm/nouveau/bar/nvc0: support chips without BAR3
...uct nouveau_device *device = nv_device(&priv->base);
> struct nouveau_gpuobj *mem;
> struct nouveau_vm *vm;
> + resource_size_t bar_len;
> int ret;
>
> - ret = nouveau_bar_create(parent, engine, oclass, &priv);
> - *pobject = nv_object(priv);
> - if (ret)
> - return ret;
> -
> - /* BAR3 */
> ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x1000, 0, 0,
> - &priv->bar[0].mem);
> - mem = priv->bar[0].mem;
> +...
2014 May 27
8
[PATCH 0/2] nvc0: support for GK20A (Tegra K1)
...: add GK20A 3D class
nvc0: use SM35 ISA with GK20A
src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 1 +
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 2 +-
src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 13 +++++++++----
src/gallium/drivers/nouveau/nv_object.xml.h | 1 +
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 9 ++++++++-
5 files changed, 20 insertions(+), 6 deletions(-)
--
1.9.3
2014 Mar 24
0
[PATCH 04/12] drm/nouveau/bar/nvc0: support chips without BAR3
...vice *device = nv_device(parent);
- struct nvc0_bar_priv *priv;
+ struct nouveau_device *device = nv_device(&priv->base);
struct nouveau_gpuobj *mem;
struct nouveau_vm *vm;
+ resource_size_t bar_len;
int ret;
- ret = nouveau_bar_create(parent, engine, oclass, &priv);
- *pobject = nv_object(priv);
- if (ret)
- return ret;
-
- /* BAR3 */
ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x1000, 0, 0,
- &priv->bar[0].mem);
- mem = priv->bar[0].mem;
+ &priv->bar[nr].mem);
+ mem = priv->bar[nr].mem;
if (ret)
return ret;
ret = nouveau_gpuobj_new(nv_objec...
2013 Aug 23
1
[PATCH] drm/nouveau/i2c: pass the function pointers in at creation time
...05.c
@@ -118,7 +118,8 @@ anx9805_aux_chan_ctor(struct nouveau_object *parent,
int ret;
ret = nouveau_i2c_port_create(parent, engine, oclass, index,
- &nouveau_i2c_aux_algo, &chan);
+ &nouveau_i2c_aux_algo, &anx9805_aux_func,
+ &chan);
*pobject = nv_object(chan);
if (ret)
return ret;
@@ -140,8 +141,6 @@ anx9805_aux_chan_ctor(struct nouveau_object *parent,
struct i2c_algo_bit_data *algo = mast->adapter.algo_data;
algo->udelay = max(algo->udelay, 40);
}
-
- chan->base.func = &anx9805_aux_func;
return 0;
}
@@ -234,7 +23...
2014 Feb 01
0
[RFC 07/16] drm/nouveau/bar/nvc0: support chips without BAR3
...vice *device = nv_device(parent);
- struct nvc0_bar_priv *priv;
+ struct nouveau_device *device = nv_device(&priv->base);
struct nouveau_gpuobj *mem;
struct nouveau_vm *vm;
+ resource_size_t bar_len;
int ret;
- ret = nouveau_bar_create(parent, engine, oclass, &priv);
- *pobject = nv_object(priv);
- if (ret)
- return ret;
-
- /* BAR3 */
ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x1000, 0, 0,
- &priv->bar[0].mem);
- mem = priv->bar[0].mem;
+ &priv->bar[nr].mem);
+ mem = priv->bar[nr].mem;
if (ret)
return ret;
ret = nouveau_gpuobj_new(nv_objec...
2014 May 16
2
[PATCH] clk: allow config option to enable reclocking
...,i,r,d) \
+ nouveau_clock_create_((p), (e), (o), (i), (r), sizeof(**d), (void **)d)
#define nouveau_clock_destroy(p) ({ \
struct nouveau_clock *clk = (p); \
_nouveau_clock_dtor(nv_object(clk)); \
@@ -121,7 +123,7 @@ struct nouveau_clocks {
int nouveau_clock_create_(struct nouveau_object *, struct nouveau_object *,
struct nouveau_oclass *,
- struct nouveau_clocks *, int, void **);
+ struct nouveau_clocks *, bool, int, void **);...
2014 May 27
0
[PATCH 1/2] nvc0: add GK20A 3D class
GK20A is mostly compatible with GK104, but features a new 3D
class. Add it to the relevant header and use it when GK20A is
detected.
Signed-off-by: Alexandre Courbot <acourbot at nvidia.com>
---
src/gallium/drivers/nouveau/nv_object.xml.h | 1 +
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 9 ++++++++-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/nouveau/nv_object.xml.h b/src/gallium/drivers/nouveau/nv_object.xml.h
index 4c93e6564838..0a0e187dc028 100644
--- a/src/gallium/drivers/nou...
2014 May 27
0
[PATCH 1/2] nvc0: add GK20A 3D class
...rote:
>> GK20A is mostly compatible with GK104, but features a new 3D
>> class. Add it to the relevant header and use it when GK20A is
>> detected.
>>
>> Signed-off-by: Alexandre Courbot <acourbot at nvidia.com>
>> ---
>> src/gallium/drivers/nouveau/nv_object.xml.h | 1 +
>> src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 9 ++++++++-
>> 2 files changed, 9 insertions(+), 1 deletion(-)
>>
>> diff --git a/src/gallium/drivers/nouveau/nv_object.xml.h b/src/gallium/drivers/nouveau/nv_object.xml.h
>> index 4c93e6564838..0a0...
2014 May 18
1
[PATCH 1/2] fb: default NvMemExec to on, turning it off is used for debugging only
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
Hope I understood you correctly wrt the mem exec stuff.
nvkm/subdev/fb/ramnv50.c | 2 +-
nvkm/subdev/fb/ramnva3.c | 2 +-
nvkm/subdev/fb/ramnvc0.c | 2 +-
nvkm/subdev/fb/ramnve0.c | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/nvkm/subdev/fb/ramnv50.c b/nvkm/subdev/fb/ramnv50.c
index ef91b6e..e5d12c2 100644
2014 May 17
0
[PATCH] clk: allow config option to enable reclocking
...f(**d), (void **)d)
> +#define nouveau_clock_create(p,e,o,i,r,d)
\
> + nouveau_clock_create_((p), (e), (o), (i), (r), sizeof(**d), (void
**)d)
> #define nouveau_clock_destroy(p) ({
\
> struct nouveau_clock *clk = (p);
\
> _nouveau_clock_dtor(nv_object(clk));
\
> @@ -121,7 +123,7 @@ struct nouveau_clocks {
>
> int nouveau_clock_create_(struct nouveau_object *, struct
nouveau_object *,
> struct nouveau_oclass *,
> - struct nouveau_clocks *, int, void **);
> +...
2014 Jan 14
2
[Fwd: [PATCH] Fix null dereference oopses for nv40 cards] kernel 3.13.0-rc8
...+23,7 @@
*/
#include <engine/graph/nv40.h>
+#include <core/device.h>
#include "nv04.h"
@@ -38,6 +39,7 @@ nv40_instmem_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
ret = nouveau_instmem_create(parent, engine, oclass, &priv);
*pobject = nv_object(priv);
+ device->subdev[NVDEV_SUBDEV_INSTMEM] = *pobject;
if (ret)
return ret;
diff --git a/drivers/gpu/drm/nouveau/core/subdev/therm/nv40.c b/drivers/gpu/drm/nouveau/core/subdev/therm/nv40.c
index 002e51b..59b25be 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/therm/nv40.c
+++ b/driver...
2014 Jan 14
2
[Fwd: [PATCH] Fix null dereference oopses for nv40 cards] kernel 3.13.0-rc8
...core/device.h>
>>
>> #include "nv04.h"
>>
>> @@ -38,6 +39,7 @@ nv40_instmem_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
>>
>> ret = nouveau_instmem_create(parent, engine, oclass, &priv);
>> *pobject = nv_object(priv);
>> + device->subdev[NVDEV_SUBDEV_INSTMEM] = *pobject;
>> if (ret)
>> return ret;
>>
>> diff --git a/drivers/gpu/drm/nouveau/core/subdev/therm/nv40.c b/drivers/gpu/drm/nouveau/core/subdev/therm/nv40.c
>> index 002e51b..59b25...
2014 Jan 10
2
[PATCH 1/3] drm/nouveau: provide a way for devinit to mark engines as disabled
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
I decided to let the user still specify config=BLA=1 to override the hw
disable in case we get something wrong or for double-checking stuff, but I
suspect it won't really be used much. I'm not terribly fond of the message
text, if you come up with something better, feel free to drop it in.
2014 Mar 24
1
[PATCH 04/12] drm/nouveau/bar/nvc0: support chips without BAR3
...nouveau_object *parent, struct nouveau_object *engine,
> - struct nouveau_oclass *oclass, void *data, u32 size,
> - struct nouveau_object **pobject)
> +nvc0_bar_init_vm(struct nvc0_bar_priv *priv, int nr, int bar)
> {
[...]
> - /* BAR3 */
> ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x1000, 0, 0,
> - &priv->bar[0].mem);
> - mem = priv->bar[0].mem;
> + &priv->bar[nr].mem);
> + mem = priv->bar[nr].mem;
> if (ret)
> return ret;
>
> ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x8000, 0, 0,
> - &p...
2015 Feb 17
0
[PATCH v3 1/6] make RAM device optional
...v/fb/base.c
index 16589fa613cd..61fde43dab71 100644
--- a/drm/nouveau/nvkm/subdev/fb/base.c
+++ b/drm/nouveau/nvkm/subdev/fb/base.c
@@ -55,9 +55,11 @@ _nvkm_fb_fini(struct nvkm_object *object, bool suspend)
struct nvkm_fb *pfb = (void *)object;
int ret;
- ret = nv_ofuncs(pfb->ram)->fini(nv_object(pfb->ram), suspend);
- if (ret && suspend)
- return ret;
+ if (pfb->ram) {
+ ret = nv_ofuncs(pfb->ram)->fini(nv_object(pfb->ram), suspend);
+ if (ret && suspend)
+ return ret;
+ }
return nvkm_subdev_fini(&pfb->base, suspend);
}
@@ -72,9 +74,11 @@ _nvk...
2015 Jan 23
0
[PATCH 1/6] make RAM device optional
...nvkm/subdev/fb/base.c
index 16589fa..61fde43 100644
--- a/drm/nouveau/nvkm/subdev/fb/base.c
+++ b/drm/nouveau/nvkm/subdev/fb/base.c
@@ -55,9 +55,11 @@ _nvkm_fb_fini(struct nvkm_object *object, bool suspend)
struct nvkm_fb *pfb = (void *)object;
int ret;
- ret = nv_ofuncs(pfb->ram)->fini(nv_object(pfb->ram), suspend);
- if (ret && suspend)
- return ret;
+ if (pfb->ram) {
+ ret = nv_ofuncs(pfb->ram)->fini(nv_object(pfb->ram), suspend);
+ if (ret && suspend)
+ return ret;
+ }
return nvkm_subdev_fini(&pfb->base, suspend);
}
@@ -72,9 +74,11 @@ _nvk...
2015 Feb 11
0
[PATCH v2 1/6] make RAM device optional
...nvkm/subdev/fb/base.c
index 16589fa..61fde43 100644
--- a/drm/nouveau/nvkm/subdev/fb/base.c
+++ b/drm/nouveau/nvkm/subdev/fb/base.c
@@ -55,9 +55,11 @@ _nvkm_fb_fini(struct nvkm_object *object, bool suspend)
struct nvkm_fb *pfb = (void *)object;
int ret;
- ret = nv_ofuncs(pfb->ram)->fini(nv_object(pfb->ram), suspend);
- if (ret && suspend)
- return ret;
+ if (pfb->ram) {
+ ret = nv_ofuncs(pfb->ram)->fini(nv_object(pfb->ram), suspend);
+ if (ret && suspend)
+ return ret;
+ }
return nvkm_subdev_fini(&pfb->base, suspend);
}
@@ -72,9 +74,11 @@ _nvk...
2013 Aug 27
0
[PATCH 5/9] drm/nouveau: Add install/remove semantics for event handlers
...t
nv50_software_vblsem_release(struct nouveau_eventh *event, int head)
{
struct nouveau_software_chan *chan =
- container_of(event, struct nouveau_software_chan, vblank.event);
+ container_of(event, struct nouveau_software_chan, vblank.event[head]);
struct nv50_software_priv *priv = (void *)nv_object(chan)->engine;
struct nouveau_bar *bar = nouveau_bar(priv);
@@ -161,7 +161,8 @@ nv50_software_context_ctor(struct nouveau_object *parent,
struct nouveau_object **pobject)
{
struct nv50_software_chan *chan;
- int ret;
+ struct nouveau_disp *disp = nouveau_disp(engine);
+ int ret, i;...
2014 Dec 18
2
[RFC PATCH 2/3] dvfs: add support for GK20A
...+static void
> +_nouveau_dvfs_work(struct nouveau_alarm *alarm)
> +{
> + struct nouveau_dvfs *dvfs = container_of(alarm, struct nouveau_dvfs,
> + alarm);
> + struct nouveau_dvfs_data *data = dvfs->data;
> + struct nouveau_object *object = nv_object(dvfs);
> + struct nouveau_dvfs_impl *impl = (void *)object->oclass;
> + struct nouveau_dvfs_dev_status status;
> + u32 utilization = 0;
> + int state, ret;
> +
> + ret = impl->get_dev_status(dvfs, &status);
> + if (ret) {
> +...