search for: nv_iowr

this series makes use of the load counters we can use to get information about the current load of the gpu. This series includes the needed pmu bits and a debugfs interface to read them out. Currently the values are between 0 and 255, because it is much easier to implement it this way on the pmu. Karol Herbst (4): subdev/pmu/fuc: add gk104 pmu/fuc: add macros for pdaemon pwr counters

...nv_iord($r13, NV_PPWR_COUNTER_COUNT(3)) + div $r13 $r13 $r14 + st(b8, #perf_eng_mc, $r13) + +#if NVKM_PPWR_CHIPSET >= GF100 + nv_iord($r13, NV_PPWR_COUNTER_COUNT(4)) + div $r13 $r13 $r14 + st(b8, #perf_eng_pcie, $r13) +#endif + + // reset the counters + imm32($r14, NV_PPWR_COUNTER_COUNT_RESET) + nv_iowr(NV_PPWR_COUNTER_COUNT(0), $r14) + nv_iowr(NV_PPWR_COUNTER_COUNT(1), $r14) + nv_iowr(NV_PPWR_COUNTER_COUNT(2), $r14) + nv_iowr(NV_PPWR_COUNTER_COUNT(3), $r14) +#if NVKM_PPWR_CHIPSET >= GF100 + nv_iowr(NV_PPWR_COUNTER_COUNT(4), $r14) +#endif + ret // description @@ -53,5 +137,69 @@ perf_recv:...

these are usually used for dynamic reclocking on gt215 and newer The counters are used to get the load of the core, memory, video and pcie loads currently I expose the loads through a debugfs "current_load" file, but I want to move that to nvif and just add a wrapper around that in debugfs for convenience Anyway there are still some issues I would like to discuss: 1. currently the

these are usually used for dynamic reclocking on gt215 and newer The counters are used to get the load of the core, memory, video and pcie loads currently I expose the loads through a debugfs "current_load" file, but I want to move that to nvif and just add a wrapper around that in debugfs for convenience. Using nvif would have the advantage, that userspace tools can easily get loads

while trying out my pmu_counter patches on a gk208 gpu, I notived that the pmu is pretty much screwed up there. Karol Herbst (4): pmu/fuc: fix imm32 for gk208+ pmu/fuc: replace mov+sethi with imm32 pmu/fuc: call# seems to be broken on gk208 pmu/fuc: movw is somewhat weird on gk208, use mov instead drm/nouveau/nvkm/subdev/pmu/fuc/gf100.fuc3.h | 1598 +++++++++++------------

reworked this series quite a lot. Now we want the Host to configure the counters through the PMU. The series isn't complete though because it needs: 1. reordering 2. better commit messages but I felt like sending those out before doing a final version. I also found some weird register overwriting issue on the PMU I have to track down, because it interfers with the counter read out. I am

I think I am done reworking the series and getting to a point where I think it is basically finished. The configuration of the slots could be improved later on when working on dynamic reclocking, but for now it's good enough to report the current GPU utilization to userspace. Patches 1-4 imeplement PMU commands to setup and readout the counters. Patches 5-6 lets Nouveau make use of 1-4. Patch

...st_send diff --git a/drm/nouveau/nvkm/subdev/pmu/fuc/kernel.fuc b/drm/nouveau/nvkm/subdev/pmu/fuc/kernel.fuc index ad35fa5..d1ca3c7 100644 --- a/drm/nouveau/nvkm/subdev/pmu/fuc/kernel.fuc +++ b/drm/nouveau/nvkm/subdev/pmu/fuc/kernel.fuc @@ -51,8 +51,7 @@ time_next: .b32 0 // $r0 - zero rd32: nv_iowr(NV_PPWR_MMIO_ADDR, $r14) - mov $r13 NV_PPWR_MMIO_CTRL_OP_RD - sethi $r13 NV_PPWR_MMIO_CTRL_TRIGGER + imm32($r13, NV_PPWR_MMIO_CTRL_OP_RD + NV_PPWR_MMIO_CTRL_TRIGGER) nv_iowr(NV_PPWR_MMIO_CTRL, $r13) rd32_wait: nv_iord($r13, NV_PPWR_MMIO_CTRL) @@ -70,9 +69,7 @@ rd32: wr32: nv_iowr(NV_PPWR_...

this series fixes the PMU on falcons v5 which fixes memory recklocking on kepler2 and would also allow us to enable memory recklocking on maxwell Karol Herbst (4): pmu/fuc: fix imm32 for gk208+ pmu/fuc: replace mov+sethi with imm32 pmu/fuc: use the call macro instead of using the call instruction directly pmu/fuc: use imm32 in ld/st macros

Patch 1 and 2 implement wait-for-vblank, required to remove flicker when reclocking memory Patch 3 and 4 allow me to do things between waiting for VBLANK and disabling FB, like pause PFIFO and wait for the engines to idle. This minimises the time PFIFO is paused, thus maximises performance. The rest of the patches speak for themselves. As the actual memory reclocking script is still somewhat prone

It's supposed to always be 0, but at least nv_iowr() temporarily violates this. Since the ih touches $r0, it should be stored. Signed-off-by: Roy Spliet <rs855 at cam.ac.uk> --- drm/nouveau/nvkm/engine/gr/fuc/gpc.fuc | 2 + drm/nouveau/nvkm/engine/gr/fuc/gpcgf100.fuc3.h | 80 ++++---- drm/nouveau/nvkm/engine/gr/fuc/gpcgf117.fuc3....

Re-use the therm-exported fan structure with only two minor modifications: - pwm_freq: u16 -> u32; - add fan_type (toggle or PWM) v2: - Do not memset the table to 0 as it erases the pre-set default values Signed-off-by: Martin Peres <martin.peres at free.fr> --- drm/Kbuild | 1 + drm/core/include/subdev/bios/fan.h | 1 + drm/core/subdev/bios/fan.c | 1