Displaying 20 results from an estimated 27 matches for "nv_dma_v0".
2020 Mar 18
0
[PATCH 8/9] drm/nouveau/kms/nv50-: Move hard-coded object handles into header
...reate(struct nvif_device *device, struct nvif_object *disp,
if (!syncbuf)
return 0;
- ret = nvif_object_init(&dmac->base.user, 0xf0000000, NV_DMA_IN_MEMORY,
+ ret = nvif_object_init(&dmac->base.user, NV50_DISP_HANDLE_SYNCBUF,
+ NV_DMA_IN_MEMORY,
&(struct nv_dma_v0) {
.target = NV_DMA_V0_TARGET_VRAM,
.access = NV_DMA_V0_ACCESS_RDWR,
@@ -164,7 +166,8 @@ nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
if (ret)
return ret;
- ret = nvif_object_init(&dmac->base.user, 0xf0000001, NV_DMA_IN_MEMORY,
+ ret = nvif_object...
2020 Apr 17
0
[RFC v3 10/11] drm/nouveau/kms/nv50-: Move hard-coded object handles into header
...reate(struct nvif_device *device, struct nvif_object *disp,
if (!syncbuf)
return 0;
- ret = nvif_object_init(&dmac->base.user, 0xf0000000, NV_DMA_IN_MEMORY,
+ ret = nvif_object_init(&dmac->base.user, NV50_DISP_HANDLE_SYNCBUF,
+ NV_DMA_IN_MEMORY,
&(struct nv_dma_v0) {
.target = NV_DMA_V0_TARGET_VRAM,
.access = NV_DMA_V0_ACCESS_RDWR,
@@ -165,7 +167,8 @@ nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
if (ret)
return ret;
- ret = nvif_object_init(&dmac->base.user, 0xf0000001, NV_DMA_IN_MEMORY,
+ ret = nvif_object...
2020 May 08
0
[RFC v4 11/12] drm/nouveau/kms/nv50-: Move hard-coded object handles into header
...reate(struct nvif_device *device, struct nvif_object *disp,
if (!syncbuf)
return 0;
- ret = nvif_object_init(&dmac->base.user, 0xf0000000, NV_DMA_IN_MEMORY,
+ ret = nvif_object_init(&dmac->base.user, NV50_DISP_HANDLE_SYNCBUF,
+ NV_DMA_IN_MEMORY,
&(struct nv_dma_v0) {
.target = NV_DMA_V0_TARGET_VRAM,
.access = NV_DMA_V0_ACCESS_RDWR,
@@ -165,7 +167,8 @@ nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
if (ret)
return ret;
- ret = nvif_object_init(&dmac->base.user, 0xf0000001, NV_DMA_IN_MEMORY,
+ ret = nvif_object...
2019 Dec 11
2
[PATCH 3/3] drm/nouveau: Support NVIDIA format modifiers
...ruct nouveau_drm *drm = nouveau_drm(fb->base.dev);
> struct nv50_wndw_ctxdma *ctxdma;
> - const u8 kind = fb->nvbo->kind;
> + const u8 kind = fb->kind;
> const u32 handle = 0xfb000000 | kind;
> struct {
> struct nv_dma_v0 base;
> @@ -243,7 +243,7 @@ nv50_wndw_atomic_check_acquire(struct nv50_wndw *wndw, bool modeset,
> if (asyw->state.fb != armw->state.fb || !armw->visible || modeset) {
> asyw->image.w = fb->base.width;
> asyw->image.h = fb->ba...
2019 Dec 11
0
[PATCH 3/3] drm/nouveau: Support NVIDIA format modifiers
...txdma_new(struct nv50_wndw *wndw, struct nouveau_framebuffer *fb)
{
struct nouveau_drm *drm = nouveau_drm(fb->base.dev);
struct nv50_wndw_ctxdma *ctxdma;
- const u8 kind = fb->nvbo->kind;
+ const u8 kind = fb->kind;
const u32 handle = 0xfb000000 | kind;
struct {
struct nv_dma_v0 base;
@@ -243,7 +243,7 @@ nv50_wndw_atomic_check_acquire(struct nv50_wndw *wndw, bool modeset,
if (asyw->state.fb != armw->state.fb || !armw->visible || modeset) {
asyw->image.w = fb->base.width;
asyw->image.h = fb->base.height;
- asyw->image.kind = fb->nvbo->...
2019 Dec 13
0
[PATCH 3/3] drm/nouveau: Support NVIDIA format modifiers
...eau_drm(fb->base.dev);
>> struct nv50_wndw_ctxdma *ctxdma;
>> - const u8 kind = fb->nvbo->kind;
>> + const u8 kind = fb->kind;
>> const u32 handle = 0xfb000000 | kind;
>> struct {
>> struct nv_dma_v0 base;
>> @@ -243,7 +243,7 @@ nv50_wndw_atomic_check_acquire(struct nv50_wndw *wndw, bool modeset,
>> if (asyw->state.fb != armw->state.fb || !armw->visible || modeset) {
>> asyw->image.w = fb->base.width;
>> asyw->...
2019 Dec 11
5
[PATCH 0/3] drm/nouveau: Support NVIDIA format modifiers
This series modifies the NV5x+ nouveau display backends to advertise
appropriate format modifiers on their display planes in atomic mode
setting blobs.
Corresponding modifications to Mesa/userspace are available here:
https://gitlab.freedesktop.org/cubanismo/mesa/tree/nouveau_work
But those need a bit of cleanup before they're ready to submit.
I've tested this on Tesla, Kepler, Pascal,
2020 Apr 17
9
[RFC v3 00/11] drm/nouveau: Introduce CRC support for gf119+
Nvidia released some documentation on how CRC support works on their
GPUs, hooray!
So: this patch series implements said CRC support in nouveau, along with
adding some special debugfs interfaces for some relevant igt-gpu-tools
tests that we'll be sending in just a short bit.
This additionally adds a feature that Ville Syrj?l? came up with: vblank
works. Basically, this is just a generic DRM
2020 Mar 18
12
[PATCH 0/9] drm/nouveau: Introduce CRC support for gf119+
Nvidia released some documentation on how CRC support works on their
GPUs, hooray!
So: this patch series implements said CRC support in nouveau, along with
adding some special debugfs interfaces for some relevant igt-gpu-tools
tests that we'll be sending in just a short bit.
This additionally adds a feature that Ville Syrj?l? came up with: vblank
works. Basically, this is just a generic DRM
2020 Feb 06
0
[PATCH 3/4] drm/nouveau: Remove field nvbo from struct nouveau_framebuffer
...struct nouveau_drm *drm = nouveau_drm(fb->base.dev);
struct nv50_wndw_ctxdma *ctxdma;
- const u8 kind = fb->nvbo->kind;
+ struct nouveau_bo *nvbo = nouveau_gem_object(fb->base.obj[0]);
+ const u8 kind = nvbo->kind;
const u32 handle = 0xfb000000 | kind;
struct {
struct nv_dma_v0 base;
@@ -236,6 +238,7 @@ nv50_wndw_atomic_check_acquire(struct nv50_wndw *wndw, bool modeset,
{
struct nouveau_framebuffer *fb = nouveau_framebuffer(asyw->state.fb);
struct nouveau_drm *drm = nouveau_drm(wndw->plane.dev);
+ struct nouveau_bo *nvbo = nouveau_gem_object(fb->base.obj[0]...
2020 May 08
16
[RFC v4 00/12] drm/nouveau: Introduce CRC support for gf119+
Nvidia released some documentation on how CRC support works on their
GPUs, hooray!
So: this patch series implements said CRC support in nouveau, along with
adding some special debugfs interfaces for some relevant igt-gpu-tools
tests (already on the ML).
First - we add some new functionality to kthread_work in the kernel, and
then use this to add a new feature to DRM that Ville Syrj?l? came up
2020 Feb 05
3
[PATCH v3 0/3] drm/nouveau: Support NVIDIA format modifiers
This series modifies the NV5x+ nouveau display backends to advertise
appropriate format modifiers on their display planes in atomic mode
setting blobs.
Corresponding modifications to Mesa/userspace are available on the
Mesa-dev mailing list as the series:
nouveau: Improved format modifier support
I've tested this on Tesla, Kepler, Pascal, and Turing-class hardware
using various formats
2020 Feb 10
3
[PATCH v5 0/3] drm/nouveau: Support NVIDIA format modifiers
This series modifies the NV5x+ nouveau display backends to advertise
appropriate format modifiers on their display planes in atomic mode
setting blobs.
Corresponding modifications to Mesa/userspace are available on the
Mesa-dev gitlab merge request 3724:
https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3724
I've tested this on Tesla, Kepler, Pascal, and Turing-class hardware
using
2020 Feb 07
3
[PATCH v4 0/3] drm/nouveau: Support NVIDIA format modifiers
This series modifies the NV5x+ nouveau display backends to advertise
appropriate format modifiers on their display planes in atomic mode
setting blobs.
Corresponding modifications to Mesa/userspace are available on the
Mesa-dev gitlab merge request 3724:
https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3724
I've tested this on Tesla, Kepler, Pascal, and Turing-class hardware
using
2020 Jun 27
9
[RFC v8 0/9] drm/nouveau: Introduce CRC support for gf119+
Nvidia released some documentation on how CRC support works on their
GPUs, hooray!
So: this patch series implements said CRC support in nouveau, along with
adding some special debugfs interfaces for some relevant igt-gpu-tools
tests (already on the ML).
First - we add some new functionality to kthread_work in the kernel, and
then use this to add a new feature to DRM that Ville Syrj?l? came up
2020 Jun 22
13
[RFC v5 00/10] drm/nouveau: Introduce CRC support for gf119+
Nvidia released some documentation on how CRC support works on their
GPUs, hooray!
So: this patch series implements said CRC support in nouveau, along with
adding some special debugfs interfaces for some relevant igt-gpu-tools
tests (already on the ML).
First - we add some new functionality to kthread_work in the kernel, and
then use this to add a new feature to DRM that Ville Syrj?l? came up
2020 Jun 22
0
[RFC v5 10/10] drm/nouveau/kms/nvd9-: Add CRC support
...ead->base.base.dev)->core;
+ int ret;
+
+ ret = nvif_mem_init_map(mmu, NVIF_MEM_VRAM, len, &ctx->mem);
+ if (ret)
+ return ret;
+
+ ret = nvif_object_init(&core->chan.base.user,
+ NV50_DISP_HANDLE_CRC_CTX(head, idx),
+ NV_DMA_IN_MEMORY,
+ &(struct nv_dma_v0) {
+ .target = NV_DMA_V0_TARGET_VRAM,
+ .access = NV_DMA_V0_ACCESS_RDWR,
+ .start = ctx->mem.addr,
+ .limit = ctx->mem.addr
+ + ctx->mem.size - 1,
+ }, sizeof(struct nv_dma_v0),
+ &ctx->ntfy);
+ if (ret)
+ goto fail_fini;
+
+ return 0;
+
+fai...
2020 Mar 18
0
[PATCH 9/9] drm/nouveau/kms/nvd9-: Add CRC support
...ead->base.base.dev)->core;
+ int ret;
+
+ ret = nvif_mem_init_map(mmu, NVIF_MEM_VRAM, len, &ctx->mem);
+ if (ret)
+ return ret;
+
+ ret = nvif_object_init(&core->chan.base.user,
+ NV50_DISP_HANDLE_CRC_CTX(head, idx),
+ NV_DMA_IN_MEMORY,
+ &(struct nv_dma_v0) {
+ .target = NV_DMA_V0_TARGET_VRAM,
+ .access = NV_DMA_V0_ACCESS_RDWR,
+ .start = ctx->mem.addr,
+ .limit = ctx->mem.addr
+ + ctx->mem.size - 1,
+ }, sizeof(struct nv_dma_v0),
+ &ctx->ntfy);
+ if (ret)
+ goto fail_fini;
+
+ return 0;
+
+fai...
2020 Apr 17
0
[RFC v3 11/11] drm/nouveau/kms/nvd9-: Add CRC support
...ead->base.base.dev)->core;
+ int ret;
+
+ ret = nvif_mem_init_map(mmu, NVIF_MEM_VRAM, len, &ctx->mem);
+ if (ret)
+ return ret;
+
+ ret = nvif_object_init(&core->chan.base.user,
+ NV50_DISP_HANDLE_CRC_CTX(head, idx),
+ NV_DMA_IN_MEMORY,
+ &(struct nv_dma_v0) {
+ .target = NV_DMA_V0_TARGET_VRAM,
+ .access = NV_DMA_V0_ACCESS_RDWR,
+ .start = ctx->mem.addr,
+ .limit = ctx->mem.addr
+ + ctx->mem.size - 1,
+ }, sizeof(struct nv_dma_v0),
+ &ctx->ntfy);
+ if (ret)
+ goto fail_fini;
+
+ return 0;
+
+fai...
2020 May 08
0
[RFC v4 12/12] drm/nouveau/kms/nvd9-: Add CRC support
...ead->base.base.dev)->core;
+ int ret;
+
+ ret = nvif_mem_init_map(mmu, NVIF_MEM_VRAM, len, &ctx->mem);
+ if (ret)
+ return ret;
+
+ ret = nvif_object_init(&core->chan.base.user,
+ NV50_DISP_HANDLE_CRC_CTX(head, idx),
+ NV_DMA_IN_MEMORY,
+ &(struct nv_dma_v0) {
+ .target = NV_DMA_V0_TARGET_VRAM,
+ .access = NV_DMA_V0_ACCESS_RDWR,
+ .start = ctx->mem.addr,
+ .limit = ctx->mem.addr
+ + ctx->mem.size - 1,
+ }, sizeof(struct nv_dma_v0),
+ &ctx->ntfy);
+ if (ret)
+ goto fail_fini;
+
+ return 0;
+
+fai...