search for: nv_devices_mutex

...--git a/drivers/gpu/drm/nouveau/core/engine/device/base.c b/drivers/gpu/drm/nouveau/core/engine/device/base.c index a6abb51..ba6c2f2 100644 --- a/drivers/gpu/drm/nouveau/core/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/core/engine/device/base.c @@ -543,3 +543,37 @@ done: mutex_unlock(&nv_devices_mutex); return ret; } + +int +nouveau_device_platform_create_(struct platform_device *pdev, u64 name, + const char *sname, const char *cfg, + const char *dbg, int length, void **pobject) +{ + struct nouveau_device *device; + int ret = -EEXIST; + + mutex_lock(&nv_devices_mutex); + list_for_ea...

...below. > +int > +nouveau_device_platform_create_(struct platform_device *pdev, u64 name, > + const char *sname, const char *cfg, > + const char *dbg, int length, void **pobject) > +{ > + struct nouveau_device *device; > + int ret = -EEXIST; > + > + mutex_lock(&nv_devices_mutex); > + list_for_each_entry(device, &nv_devices, head) { > + if (device->handle == name) > + goto done; > + } > + > + ret = nouveau_engine_create_(NULL, NULL, &nouveau_device_oclass, true, > + "DEVICE", "device", length, pobject); > +...

...-ENOMEM; - goto done; - } + device->pri = map; } mutex_init(&device->mutex); @@ -3254,6 +3253,10 @@ nvkm_device_ctor(const struct nvkm_device_func *func, ret = 0; done: + if (map && (!mmio || ret)) { + device->pri = NULL; + iounmap(map); + } mutex_unlock(&nv_devices_mutex); return ret; } -- 2.25.3

...gt;pdev->irq; + } else { + return platform_get_irq_byname(device->platformdev, + stall ? "stall" : "nonstall"); + } +} + static struct nouveau_oclass nouveau_device_oclass = { .handle = NV_ENGINE(DEVICE, 0x00), @@ -489,3 +555,37 @@ done: mutex_unlock(&nv_devices_mutex); return ret; } + +int +nouveau_device_platform_create_(struct platform_device *pdev, u64 name, + const char *sname, const char *cfg, + const char *dbg, int length, void **pobject) +{ + struct nouveau_device *device; + int ret = -EEXIST; + + mutex_lock(&nv_devices_mutex); + list_for_ea...

...100644 > --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c > +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c > @@ -28,6 +28,7 @@ > #include <core/option.h> > > #include <subdev/bios.h> > +#include <subdev/therm.h> > > static DEFINE_MUTEX(nv_devices_mutex); > static LIST_HEAD(nv_devices); > @@ -1682,7 +1683,7 @@ nve4_chipset = { > .mxm = nv50_mxm_new, > .pci = gk104_pci_new, > .pmu = gk104_pmu_new, > - .therm = gf119_therm_new, > + .therm = gk104_therm_new, > .timer = nv41_timer_ne...

.../base.c index 08e77cd55e6e..74bd09b1c893 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -28,6 +28,7 @@ #include <core/option.h> #include <subdev/bios.h> +#include <subdev/therm.h> static DEFINE_MUTEX(nv_devices_mutex); static LIST_HEAD(nv_devices); @@ -1682,7 +1683,7 @@ nve4_chipset = { .mxm = nv50_mxm_new, .pci = gk104_pci_new, .pmu = gk104_pmu_new, - .therm = gf119_therm_new, + .therm = gk104_therm_new, .timer = nv41_timer_new, .top = gk104_top_new, .volt = gk104_volt_new, @@ -1721,7 +1722,7 @@ n...

.../base.c index 08e77cd55e6e..74bd09b1c893 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -28,6 +28,7 @@ #include <core/option.h> #include <subdev/bios.h> +#include <subdev/therm.h> static DEFINE_MUTEX(nv_devices_mutex); static LIST_HEAD(nv_devices); @@ -1682,7 +1683,7 @@ nve4_chipset = { .mxm = nv50_mxm_new, .pci = gk104_pci_new, .pmu = gk104_pmu_new, - .therm = gf119_therm_new, + .therm = gk104_therm_new, .timer = nv41_timer_new, .top = gk104_top_new, .volt = gk104_volt_new, @@ -1721,7 +1722,7 @@ n...

.../base.c index 00eeaaffeae5..6c5f966c66ad 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -28,6 +28,7 @@ #include <core/option.h> #include <subdev/bios.h> +#include <subdev/therm.h> static DEFINE_MUTEX(nv_devices_mutex); static LIST_HEAD(nv_devices); @@ -1682,7 +1683,7 @@ nve4_chipset = { .mxm = nv50_mxm_new, .pci = gk104_pci_new, .pmu = gk104_pmu_new, - .therm = gf119_therm_new, + .therm = gk104_therm_new, .timer = nv41_timer_new, .top = gk104_top_new, .volt = gk104_volt_new, @@ -1721,7 +1722,7 @@ n...

...44 --- a/drm/nouveau/nvkm/engine/device/base.c +++ b/drm/nouveau/nvkm/engine/device/base.c @@ -2496,6 +2496,9 @@ nvkm_device_del(struct nvkm_device **pdevice) if (device->func->dtor) *pdevice = device->func->dtor(device); + + nvkm_falcon_cleanup(device); + mutex_unlock(&nv_devices_mutex); kfree(*pdevice); @@ -2715,6 +2718,8 @@ nvkm_device_ctor(const struct nvkm_device_func *func, } mutex_init(&device->mutex); + mutex_init(&device->falcon_mutex); + INIT_LIST_HEAD(&device->falcons); for (i = 0; i < NVKM_SUBDEV_NR; i++) { #define _(s,m) case s:...

...name, >> + const char *sname, const char *cfg, >> + const char *dbg, int length, void **pobject) >> +{ >> + struct nouveau_device *device; >> + int ret = -EEXIST; >> + >> + mutex_lock(&nv_devices_mutex); >> + list_for_each_entry(device, &nv_devices, head) { >> + if (device->handle == name) >> + goto done; >> + } >> + >> + ret = nouveau_engine_create_(NULL, NULL, &nouveau_device_oclass, true, >> +...

Hello everyone, GK20A is the Kepler-based GPU used in the upcoming Tegra K1 chips. The following patches perform architectural changes to Nouveau that are necessary to support non-PCI GPUs and add initial support for GK20A. Although the support is still very basic and more user-space changes will be needed to make the full graphics stack run on top of it, we were able to successfully open

Next version of my patchseries for adding clockgating support for kepler1 and 2 on nouveau. The first version of this series can be found here: https://patchwork.freedesktop.org/series/36504/ Some minor changes: - Clarified that SLCG stands for 'secondary level clockgating', thanks for the small tip nvidia! - Removed the concept of levels, this was more useful for debugging then

It's here! After a lot of investigation, rewrites, and traces, I present the patch series to implement all known levels of clockgating for Kepler1 and Kepler2 GPUs. Starting with Fermi GPUs (this is probably present on earlier GPUs as well, but with a far less easy to manage interface), nvidia added two clockgating levels that are handled mostly in firmware (with the exception of course, of

Next version of my patchseries for adding clockgating support for kepler1 and 2 on nouveau. The first version of this series can be found here: https://patchwork.freedesktop.org/series/36504/ Some very important changes: - Fix gf100_clkgate_init() to actually write registers! This got broken in the last version by accident - Dump the register packs and the resulting register writes into

Next version of my patchseries for adding clockgating support for kepler1 and 2 on nouveau. The first version of this series can be found here: https://patchwork.freedesktop.org/series/36504/ One small change: - Set therm->clkgate_enabled to false until the last patch, where we introduce the NvPmEnableGating option Lyude Paul (5): drm/nouveau: Add support for basic clockgating on

Next version of my patchseries for adding clockgating support for kepler1 and 2 on nouveau. The first version of this series can be found here: https://patchwork.freedesktop.org/series/36504/ One small change: - Add Martin's R-B, whoops Lyude Paul (5): drm/nouveau: Add support for basic clockgating on Kepler1 drm/nouveau: Add support for BLCG on Kepler1 drm/nouveau: Add support for

Next version of my patchseries for adding clockgating support for kepler1 and 2 on nouveau. The first version of this series can be found here: https://patchwork.freedesktop.org/series/36504/ Some small changes (shouldn't change anything functionally): - Made gf100_therm_new, gk104_clkgate_pack, and gk110_fb_clkgate_blcg_init_unk_0 static (re: kbuild test bot) - Making all three of

This was the first step of the secure boot refactoring - as Ben asked for some fixes, I now submit it as its own series to make it easier to review (and also because rebasing secure boot on top of this takes time and I don't want to do it until this is validated!). This series attempts to factorize the duplicate falcon-related code into a single library, using the existing nvkm_falcon