search for: nv_device_to_platform

...gt;mmu; > + struct nvkm_mm_node *node; > + struct nouveau_platform_device *plat; > + struct gk20a_mmu_iommu_mapping *p; > + int npages = 1 << (mmu->lpg_shift - mmu->spg_shift); > + int i, ret; > + u64 addr; > + > + plat = nv_device_to_platform(nv_device(&mmu->base)); > + > + *priv = kzalloc(sizeof(struct gk20a_mmu_iommu_mapping), GFP_KERNEL); > + if (!*priv) > + return; > + > + mutex_lock(&plat->gpu->iommu.mutex); > + ret = nvkm_mm_head(plat->gpu->iommu.mm,...

LTC device is now required for PGRAPH to work, add it. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- nvkm/engine/device/nve0.c | 1 + 1 file changed, 1 insertion(+) diff --git a/nvkm/engine/device/nve0.c b/nvkm/engine/device/nve0.c index 54ec53bc6252..cdf9147f32a1 100644 --- a/nvkm/engine/device/nve0.c +++ b/nvkm/engine/device/nve0.c @@ -163,6 +163,7 @@

.....ca22c525329a 100644 --- a/drm/nouveau_platform.h +++ b/drm/nouveau_platform.h @@ -28,6 +28,7 @@ struct reset_control; struct clk; struct regulator; +struct platform_driver; struct nouveau_platform_gpu { struct reset_control *rst; @@ -48,4 +49,6 @@ struct nouveau_platform_device { #define nv_device_to_platform(d) \ container_of(d, struct nouveau_platform_device, device) +extern struct platform_driver nouveau_platform_driver; + #endif -- 2.2.1

Hi, Generally the the imported buffers which has memory type TTM_PL_TT are mapped as small pages probably due to lack of big page allocation. But the platform device which also use memory type TTM_PL_TT, like GK20A, can *allocate* big page though the IOMMU hardware inside the SoC. This is a try to map the imported buffers as big pages in GMMU by the platform IOMMU. With some preparation work to

...urn 0; + +power_down: + nouveau_platform_power_down(gpu); + + return err; +} + +static int nouveau_platform_remove(struct platform_device *pdev) +{ + struct drm_device *drm_dev = platform_get_drvdata(pdev); + struct nouveau_device *device = nouveau_dev(drm_dev); + struct nouveau_platform_gpu *gpu = nv_device_to_platform(device)->gpu; + + nouveau_drm_device_remove(drm_dev); + + return nouveau_platform_power_down(gpu); +} + +#if IS_ENABLED(CONFIG_OF) +static const struct of_device_id nouveau_platform_match[] = { + { .compatible = "nvidia,gk20a" }, + { } +}; + +MODULE_DEVICE_TABLE(of, nouveau_platform_ma...

...uct platform_device *pdev) { struct drm_device *drm_dev = platform_get_drvdata(pdev); - struct nouveau_device *device = nouveau_dev(drm_dev); + struct nouveau_drm *drm = nouveau_drm(drm_dev); + struct nouveau_device *device = nvkm_device(&drm->device); struct nouveau_platform_gpu *gpu = nv_device_to_platform(device)->gpu; nouveau_drm_device_remove(drm_dev); -- 2.0.4

This series adds support for probing platform devices on Nouveau, as well as the DT bindings for GK20A. It doesn't enable the GPU yet on Tegra boards since a few extra things need to be supported before that. This version is mostly identical to v2 but fixes an important issue: the drvdata must be set to the drm_device for sysfs to work, so the platform device structure now includes the

On Sat, Apr 18, 2015 at 12:37 AM, Terje Bergstrom <tbergstrom at nvidia.com> wrote: > > On 04/17/2015 02:11 AM, Alexandre Courbot wrote: >> >> Tracking the PDE and PTE of each memory chunk can probably be avoided >> if you change your unmapping strategy. Currently you are going through >> the list of nvkm_vm_bp_list, but you know your PDE and PTE are always

Hi, This series includes some pieces of fixes to complete the GK20A power on/off sequences and add the suspend/resume support. The patches 1/11 - 4/11 are based on the linux-next-20141219. The patches 5/11 - 11/11 are based on the branch "linux-3.19" of Ben Skeggs's tree (http://cgit.freedesktop.org/~darktama/nouveau). Thanks, Vince Vince Hsu (4): (linux-next-20141219) ARM:

Some Tegra drivers might be compiled as kernel modules, and they need the fuse information for initialization. One example is the GK20A Nouveau driver. It needs the GPU speedo value to calculate frequency-voltage table. So export the tegra_sku_info. Signed-off-by: Vince Hsu <vinceh at nvidia.com> Acked-by: Alexandre Courbot <acourbot at nvidia.com> Acked-by: Thierry Reding <treding

...b/drm/nouveau_platform.h > @@ -28,6 +28,7 @@ > struct reset_control; > struct clk; > struct regulator; > +struct platform_driver; > > struct nouveau_platform_gpu { > struct reset_control *rst; > @@ -48,4 +49,6 @@ struct nouveau_platform_device { > #define nv_device_to_platform(d) \ > container_of(d, struct nouveau_platform_device, device) > > +extern struct platform_driver nouveau_platform_driver; > + > #endif > -- > 2.2.1 > > _______________________________________________ > Nouveau mai...

...r_down(gpu); > + > + return err; > +} > + > +static int nouveau_platform_remove(struct platform_device *pdev) > +{ > + struct drm_device *drm_dev = platform_get_drvdata(pdev); > + struct nouveau_device *device = nouveau_dev(drm_dev); > + struct nouveau_platform_gpu *gpu = nv_device_to_platform(device)->gpu; > + > + nouveau_drm_device_remove(drm_dev); > + > + return nouveau_platform_power_down(gpu); > +} > + > +#if IS_ENABLED(CONFIG_OF) > +static const struct of_device_id nouveau_platform_match[] = { > + { .compatible = "nvidia,gk20a" }, > + { }...

...ct **pobject) +{ + struct gk20a_volt_priv *priv; + struct nouveau_volt *volt; + struct nouveau_platform_device *plat; + int i, ret, uv; + + ret = nouveau_volt_create(parent, engine, oclass, &priv); + *pobject = nv_object(priv); + if (ret) + return ret; + + volt = &priv->base; + + plat = nv_device_to_platform(nv_device(parent)); + + uv = regulator_get_voltage(plat->gpu->vdd); + nv_info(priv, "The default voltage is %duV\n", uv); + + priv->vdd = plat->gpu->vdd; + priv->base.vid_get = gk20a_volt_vid_get; + priv->base.vid_set = gk20a_volt_vid_set; + priv->base.set_id = gk2...

...ct **pobject) +{ + struct gk20a_volt_priv *priv; + struct nouveau_volt *volt; + struct nouveau_platform_device *plat; + int i, ret, uv; + + ret = nouveau_volt_create(parent, engine, oclass, &priv); + *pobject = nv_object(priv); + if (ret) + return ret; + + volt = &priv->base; + + plat = nv_device_to_platform(nv_device(parent)); + + uv = regulator_get_voltage(plat->gpu->vdd); + nv_info(priv, "The default voltage is %duV\n", uv); + + priv->vdd = plat->gpu->vdd; + priv->base.vid_get = gk20a_volt_vid_get; + priv->base.vid_set = gk20a_volt_vid_set; + priv->base.set_id = gk2...

...ct nouveau_volt *volt; > + struct nouveau_platform_device *plat; > + int i, ret, uv; > + > + ret = nouveau_volt_create(parent, engine, oclass, &priv); > + *pobject = nv_object(priv); > + if (ret) > + return ret; > + > + volt = &priv->base; > + > + plat = nv_device_to_platform(nv_device(parent)); > + > + uv = regulator_get_voltage(plat->gpu->vdd); > + nv_info(priv, "The default voltage is %duV\n", uv); > + > + priv->vdd = plat->gpu->vdd; > + priv->base.vid_get = gk20a_volt_vid_get; > + priv->base.vid_set = gk20a_volt_vi...

Some Tegra drivers might be complied as kernel modules, and they need the fuse information for initialization. One example is the GK20A Nouveau driver. It needs the GPU speedo value to calculate frequency-voltage table. So export the tegra_sku_info. Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- v2: add more description why we need this patch drivers/soc/tegra/fuse/fuse-tegra.c | 1

...struct gk20a_instmem_priv *priv; + struct nouveau_platform_device *plat; int ret; ret = nvkm_instmem_create(parent, engine, oclass, &priv); @@ -211,6 +410,18 @@ gk20a_instmem_ctor(struct nvkm_object *parent, struct nvkm_object *engine, spin_lock_init(&priv->lock); + plat = nv_device_to_platform(nv_device(parent)); + if (plat->gpu->iommu.domain) { + priv->domain = plat->gpu->iommu.domain; + priv->mm = plat->gpu->iommu.mm; + priv->iommu_pgshift = plat->gpu->iommu.pgshift; + priv->mm_mutex = &plat->gpu->iommu.mutex; + + nv_info(priv, "u...

...at; >> + int i, ret, uv; >> + >> + ret = nouveau_volt_create(parent, engine, oclass, &priv); >> + *pobject = nv_object(priv); >> + if (ret) >> + return ret; >> + >> + volt = &priv->base; >> + >> + plat = nv_device_to_platform(nv_device(parent)); >> + >> + uv = regulator_get_voltage(plat->gpu->vdd); >> + nv_info(priv, "The default voltage is %duV\n", uv); >> + >> + priv->vdd = plat->gpu->vdd; >> + priv->base.vid_get = gk20a_volt_vid_get; >>...

Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- nvkm/subdev/volt/base.c | 67 ++++++++++++++++++++++++++++--------------------- 1 file changed, 38 insertions(+), 29 deletions(-) diff --git a/nvkm/subdev/volt/base.c b/nvkm/subdev/volt/base.c index 32794a999106..26ccd8df193f 100644 --- a/nvkm/subdev/volt/base.c +++ b/nvkm/subdev/volt/base.c @@ -101,6 +101,41 @@ nouveau_volt_set_id(struct

Some Tegra drivers might be compiled as kernel modules, and they need the fuse information for initialization. One example is the GK20A Nouveau driver. It needs the GPU speedo value to calculate frequency-voltage table. So export the tegra_sku_info. Signed-off-by: Vince Hsu <vinceh at nvidia.com> Acked-by: Alexandre Courbot <acourbot at nvidia.com> Acked-by: Thierry Reding <treding