search for: nv_device_is_cpu_coherent

...d the way pages are mapped to the GPU on platform devices - Thoroughly checked with CONFIG_DMA_API_DEBUG that there were no API violations Alexandre Courbot (6): drm/ttm: expose CPU address of DMA-allocated pages drm/nouveau: map pages using DMA API on platform devices drm/nouveau: introduce nv_device_is_cpu_coherent() drm/nouveau: synchronize BOs when required drm/nouveau: implement explicitly coherent BOs drm/nouveau: allocate GPFIFOs and fences coherently drivers/gpu/drm/nouveau/core/engine/device/base.c | 14 ++- drivers/gpu/drm/nouveau/core/include/core/device.h | 3 + drivers/gpu/drm/nouveau/n...

...submitting it since the issue is still not resolved and leads in inferior-looking code in at least Nouveau. Phew, sorry for the long cover letter - thanks if you have read until here! :) Changes since v4: - Only use DMA API for sync, as suggested by Daniel Alexandre Courbot (4): drm: introduce nv_device_is_cpu_coherent() drm: implement explicitly coherent BOs drm: allocate GPFIFOs and fences coherently drm: synchronize BOs when required drm/nouveau_bo.c | 122 ++++++++++++++++++++++++++++++++++++++++++--- drm/nouveau_bo.h | 3 ++ drm/nouveau_chan.c | 2 +- drm/nouveau_gem.c...

...u_bo *nvbo) > +{ > + struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev); > + struct nouveau_device *device = nouveau_dev(drm->dev); > + struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm; > + int i; > + > + if (!ttm_dma) > + return; > + > + if (nv_device_is_cpu_coherent(device) || nvbo->force_coherent) > + return; Is the is_cpu_coherent check really required? On coherent platforms the sync_for_foo should be a noop. It's the dma api's job to encapsulate this knowledge so that drivers can be blissfully ignorant. The explicit is_coherent check makes t...

...+void +nouveau_bo_sync_for_device(struct nouveau_bo *nvbo) +{ + struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev); + struct nouveau_device *device = nouveau_dev(drm->dev); + struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm; + int i; + + if (!ttm_dma) + return; + + if (nv_device_is_cpu_coherent(device) || nvbo->force_coherent) + return; + + if (nv_device_is_pci(device)) { + for (i = 0; i < ttm_dma->ttm.num_pages; i++) + pci_dma_sync_single_for_device(device->pdev, + ttm_dma->dma_address[i], PAGE_SIZE, + PCI_DMA_TODEVICE); + } else { + for (i = 0; i < ttm_dma-&...

...v(nvbo->bo.bdev); > >>+ struct nouveau_device *device = nouveau_dev(drm->dev); > >>+ struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm; > >>+ int i; > >>+ > >>+ if (!ttm_dma) > >>+ return; > >>+ > >>+ if (nv_device_is_cpu_coherent(device) || nvbo->force_coherent) > >>+ return; > > > >Is the is_cpu_coherent check really required? On coherent platforms the > >sync_for_foo should be a noop. It's the dma api's job to encapsulate this > >knowledge so that drivers can be blissfully igno...

On Fri, Jul 11, 2014 at 12:35 PM, Alexandre Courbot <acourbot at nvidia.com> wrote: > On 07/10/2014 09:58 PM, Daniel Vetter wrote: >> >> On Tue, Jul 08, 2014 at 05:25:57PM +0900, Alexandre Courbot wrote: >>> >>> page_to_phys() is not the correct way to obtain the DMA address of a >>> buffer on a non-PCI system. Use the DMA API functions for this,

...t nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev); >> + struct nouveau_device *device = nouveau_dev(drm->dev); >> + struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm; >> + int i; >> + >> + if (!ttm_dma) >> + return; >> + >> + if (nv_device_is_cpu_coherent(device) || nvbo->force_coherent) >> + return; > > Is the is_cpu_coherent check really required? On coherent platforms the > sync_for_foo should be a noop. It's the dma api's job to encapsulate this > knowledge so that drivers can be blissfully ignorant. The explicit &g...

...1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drm/nouveau_bo.c b/drm/nouveau_bo.c index 686fbd62381e..038d7e30c305 100644 --- a/drm/nouveau_bo.c +++ b/drm/nouveau_bo.c @@ -1573,8 +1573,10 @@ nouveau_ttm_tt_unpopulate(struct ttm_tt *ttm) * so use the DMA API for them. */ if (!nv_device_is_cpu_coherent(device) && - ttm->caching_state == tt_uncached) + ttm->caching_state == tt_uncached) { ttm_dma_unpopulate(ttm_dma, dev->dev); + return; + } #if __OS_HAS_AGP if (drm->agp.stat == ENABLED) { -- 2.1.3

...see is that they always invalidate the full buffer whereas bus snooping only affects pages that are actually touched. Someone would need to try this on a desktop machine and see how it affects performance. I'd be all for it though, since it would also allow us to get rid of this ungraceful nv_device_is_cpu_coherent() function and result in simplifying nouveau_bo.c a bit.

...@@ nouveau_bo_new(struct drm_device *dev, int size, int align, INIT_LIST_HEAD(&nvbo->entry); INIT_LIST_HEAD(&nvbo->vma_list); nvbo->tile_mode = tile_mode; - nvbo->tile_flags = tile_flags; + nvbo->bo_flags = bo_flags; nvbo->bo.bdev = &drm->ttm.bdev; if (!nv_device_is_cpu_coherent(nvkm_device(&drm->device))) @@ -272,7 +272,7 @@ set_placement_range(struct nouveau_bo *nvbo, uint32_t type) * speed up when alpha-blending and depth-test are enabled * at the same time. */ - if (nvbo->tile_flags & NOUVEAU_GEM_TILE_ZETA) { + if (nvbo->bo_flags & NO...

Hi guys, I'd like to start a new thread about explicit fence synchronization. This time with a Nouveau twist. :-) First, let me define what I understand by implicit/explicit sync: Implicit synchronization * Fences are attached to buffers * Kernel manages fences automatically based on buffer read/write access Explicit synchronization * Fences are passed around independently * Kernel takes