search for: nv_accel_common

Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com> --- src/nv_accel_common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/nv_accel_common.c b/src/nv_accel_common.c index 4484c1c..eebb0ab 100644 --- a/src/nv_accel_common.c +++ b/src/nv_accel_common.c @@ -37,7 +37,7 @@ nouveau_allocate_surface(ScrnInfoPtr scrn, int width, int height, int bpp, Bo...

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- Untested. src/nouveau_copy.c | 2 ++ src/nouveau_exa.c | 1 + src/nv_accel_common.c | 1 + src/nv_driver.c | 3 +++ src/nv_type.h | 1 + src/nvc0_accel.c | 6 ++++++ 6 files changed, 14 insertions(+) diff --git a/src/nouveau_copy.c b/src/nouveau_copy.c index 7118a7a..7fbcc87 100644 --- a/src/nouveau_copy.c +++ b/src/nouveau_copy.c @@ -42,6 +42,7 @@ nouveau_co...

...lt;marcin.slusarz at gmail.com> after this change nouveau passes all fill and blend tests of rendercheck (before: fill - 108/120, blend - 3323868/3569150) tested on NV34 Signed-off-by: Marcin Slusarz <marcin.slusarz at gmail.com> --- src/nv04_exa.c | 19 +++++++++---------- src/nv_accel_common.c | 5 ++++- 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/src/nv04_exa.c b/src/nv04_exa.c index 132c9d5..1852f99 100644 --- a/src/nv04_exa.c +++ b/src/nv04_exa.c @@ -81,7 +81,7 @@ NV04EXAPrepareSolid(PixmapPtr pPixmap, int alu, Pixel planemask, Pixel fg) struct nouveau_grob...

--- src/nouveau_dri2.c | 4 +++- src/nv_accel_common.c | 4 ++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/src/nouveau_dri2.c b/src/nouveau_dri2.c index d14443f..b99893f 100644 --- a/src/nouveau_dri2.c +++ b/src/nouveau_dri2.c @@ -46,6 +46,8 @@ nouveau_dri2_create_buffer(DrawablePtr pDraw, unsigned int attachment, ppix-&g...

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- v1 -> v2: add 0x130 as a valid chip type early on in detection src/nouveau_copy.c | 2 ++ src/nouveau_exa.c | 1 + src/nv_accel_common.c | 1 + src/nv_driver.c | 4 ++++ src/nv_type.h | 1 + src/nvc0_accel.c | 6 ++++++ 6 files changed, 15 insertions(+) diff --git a/src/nouveau_copy.c b/src/nouveau_copy.c index 7118a7a..7fbcc87 100644 --- a/src/nouveau_copy.c +++ b/src/nouveau_copy.c @@ -42,6 +42,7 @@ nouveau_c...

Hello, I found xf86-video-nouveau unable to compile on my system. Failing with two errors in nv_accel_common.c about NV50_2D_CLIP_ENABLE and NV50_2D_COLOR_KEY_ENABLE not being defined. Comparing the source to xf86-video-nv, i found the missing constants to be 0x290 for CLIP_ENABLE and 0x29c for COLOR_KEY_ENABLE. This got nv_accel_common.c to compile. I'd request these two constants to be defined to...

...nt h, if (!NVAccelM2MF(pNv, w, lines, cpp, tmp_offset, 0, tmp, NOUVEAU_BO_GART, tmp_pitch, lines, 0, 0, - nouveau_pixmap_bo(pdpix), NOUVEAU_BO_VRAM, + nouveau_pixmap_bo(pdpix), NOUVEAU_BO_APER, dst_pitch, pdpix->drawable.height, x, y)) goto memcpy; diff --git a/src/nv_accel_common.c b/src/nv_accel_common.c index 4484c1c..e1a8a12 100644 --- a/src/nv_accel_common.c +++ b/src/nv_accel_common.c @@ -37,7 +37,7 @@ nouveau_allocate_surface(ScrnInfoPtr scrn, int width, int height, int bpp, Bool tiled = (usage_hint & NOUVEAU_CREATE_PIXMAP_TILED); Bool shared = FALSE; union...

...les. Yeah, I should probably do that. src/nv10_exa.c | 8 ++++---- src/nv30_exa.c | 20 ++++++++++---------- src/nv40_exa.c | 8 ++++---- src/nv50_accel.c | 6 +++--- src/nv50_accel.h | 1 + src/nv50_exa.c | 8 ++++---- src/nv50_xv.c | 2 +- src/nv_accel_common.c | 6 +++--- src/nvc0_accel.c | 4 ++-- src/nvc0_exa.c | 2 +- 10 files changed, 33 insertions(+), 32 deletions(-) diff --git a/src/nv10_exa.c b/src/nv10_exa.c index 78bc739..7daa281 100644 --- a/src/nv10_exa.c +++ b/src/nv10_exa.c @@ -697,9 +697,9 @@ NVAccelInitNV10TCL(ScrnInfoPtr...

Hello, I found xf86-video-nouveau unable to compile on my system. Failing with two errors in nv_accel_common.c about NV50_2D_CLIP_ENABLE and NV50_2D_COLOR_KEY_ENABLE not being defined. Comparing the source to xf86-video-nv, i found the missing constants to be 0x290 for CLIP_ENABLE and 0x29c for COLOR_KEY_ENABLE. This got nv_accel_common.c to compile. I'd request these two constants to be defined to...

...gt; --- Note: this won't work for GM20x - we need to allow TIC format to be updated for that to work. But this is a step in that direction. src/Makefile.am | 16 ++++++++ src/nouveau_copy.c | 1 + src/nouveau_exa.c | 2 +- src/nouveau_xv.c | 2 +- src/nv_accel_common.c | 1 + src/nv_driver.c | 1 + src/nvc0_accel.c | 37 ++++++++++++++--- src/nvc0_exa.c | 48 ++++++++++++++++++++-- src/nvc0_xv.c | 48 ++++++++++++++++++++-- src/shader/Makefile | 23 ++++++++--- src/shader/exac8nv110.fp | 47 +++++++++...

...h could be used for all nvc0 generations, but I didn't want to rock the boat. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/Makefile.am | 16 ++++++++ src/nouveau_copy.c | 1 + src/nouveau_exa.c | 2 +- src/nouveau_xv.c | 2 +- src/nv_accel_common.c | 1 + src/nv_driver.c | 1 + src/nvc0_accel.c | 37 ++++++++++++++--- src/nvc0_exa.c | 48 ++++++++++++++++++++-- src/nvc0_xv.c | 48 ++++++++++++++++++++-- src/shader/Makefile | 23 ++++++++--- src/shader/exac8nv110.fp | 47 +++++++++...

...for GM20x - we need to allow TIC format to be updated > for that to work. But this is a step in that direction. > > src/Makefile.am | 16 ++++++++ > src/nouveau_copy.c | 1 + > src/nouveau_exa.c | 2 +- > src/nouveau_xv.c | 2 +- > src/nv_accel_common.c | 1 + > src/nv_driver.c | 1 + > src/nvc0_accel.c | 37 ++++++++++++++--- > src/nvc0_exa.c | 48 ++++++++++++++++++++-- > src/nvc0_xv.c | 48 ++++++++++++++++++++-- > src/shader/Makefile | 23 ++++++++--- > src/shader/...

hello when i Tried to compile xf86-video-nouveau come this message: cc1: error: unrecognized command line option "-minline-all-stringops" make[2]: *** [nv_accel_common.lo] Error 1 make[1]: *** [all-recursive] Error 1 make: *** [all] Error 2 ___________________________________ L'email della prossima generazione? Puoi averla con la nuova Yahoo! Mail: http://it.docs.yahoo.com/nowyoucan.html

...OS: All Reporter: pstglia at gmail.com Hardware: Other Status: NEW Version: unspecified Component: Driver/nouveau Product: xorg Hi, I was analyzing xf86 video nouveau code and found a possible bug on nouveau_allocate_surface (nv_accel_common.c src file) When setting tile_mode for NV_FERMI/NVC0 or higher families, it uses tile_mode to calculate height. However, instead of using "cfg.nvc0.tile_mode" it is using "cfg.nv50.tile_mode". See bellow: if (pNv->Architecture >= NV_FERMI) {...

...ng replace NoAccel with AccelMethod in preparation for glamor support dri2: move "is supported" checks out of nv_driver.c exa: move module load into nouveau_exa_init pull copy engine handling into one place, a place that isn't also exa merge nv_dma.c into nv_accel_common.c 50/c0/e0 -> tesla/fermi/kepler add support for maxwell, minus Xv/renderaccel glamor: initial support (no dri) glamor: provide dri3 support when enabled default to glamor on maxwell sync: fix build against DRI3-less server glamor: fix randr resize...

...ng replace NoAccel with AccelMethod in preparation for glamor support dri2: move "is supported" checks out of nv_driver.c exa: move module load into nouveau_exa_init pull copy engine handling into one place, a place that isn't also exa merge nv_dma.c into nv_accel_common.c 50/c0/e0 -> tesla/fermi/kepler add support for maxwell, minus Xv/renderaccel glamor: initial support (no dri) glamor: provide dri3 support when enabled default to glamor on maxwell sync: fix build against DRI3-less server glamor: fix randr resize...

.../hwdefs/gm107_texture.xml.h | 365 +++++++++++++++++ src/hwdefs/nvc0_3d.xml.h | 867 +++++++++++++++++++++++++---------------- src/nouveau_copy.c | 3 + src/nouveau_exa.c | 2 +- src/nouveau_local.h | 2 +- src/nouveau_xv.c | 2 +- src/nv_accel_common.c | 1 + src/nv_driver.c | 3 + src/nvc0_accel.c | 68 +++- src/nvc0_accel.h | 57 +++ src/nvc0_exa.c | 71 ++-- src/nvc0_xv.c | 115 +++--- src/shader/Makefile | 23 +- src/shader/exac8nv110.fp...

Hi All, Here is a bunch of fixes for nv30 cards, the first patch is a resend of a patch I send a while back. AFAICT that one is ready for merging, but it is not entirely clear to me what the process is for getting (nouveau) mesa patches merged. Should I request commit rights, and push my own patches once they have been reviewed ? Regards, Hans

...which > means that there's no way to recover the "are you swizzled" > information after-the-fact. > > Presumably you should create a "nv04" bo config section in the union, That already exists, and indeed gets set by the nouveau_allocate_surface function from src/nv_accel_common.c from the ddx, > and just pass the single "swizzled" bit through. I'm not sure what, if > anything, is required on the kernel side for that. I don't think > there's any optionality in how the swizzling is done for pre-nv50. > > Note that in the nv30_miptree lo...

...ed git bisect bad 81148bb1dbc7007c021c59411d56cb31cfc74ef2 # good: [b24cae0bf5db6ece21439d4c6ff3668aed4c78d6] dri2: move "is supported" checks out of nv_driver.c git bisect good b24cae0bf5db6ece21439d4c6ff3668aed4c78d6 # good: [4b138ab18f58c6d459e21dc319615f536c8e69c8] merge nv_dma.c into nv_accel_common.c git bisect good 4b138ab18f58c6d459e21dc319615f536c8e69c8 # good: [fd0ce8839f307693d86c7602dd926ce79e6b777d] add support for maxwell, minus Xv/renderaccel git bisect good fd0ce8839f307693d86c7602dd926ce79e6b777d # bad: [86024ceef015ffe31a204cc5bc6c326a19363ff1] glamor: initial support (no dri) git...