search for: nv84_fence_chan

Displaying 4 results from an estimated 4 matches for "nv84_fence_chan".

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2013 Sep 02
2
[PATCH] drm/nv84-: write fence value on exit, and restore value on init.
...2cf0ade..daf4b18 100644 --- a/drivers/gpu/drm/nouveau/nv84_fence.c +++ b/drivers/gpu/drm/nouveau/nv84_fence.c @@ -122,8 +122,11 @@ nv84_fence_context_del(struct nouveau_channel *chan) struct drm_device *dev = chan->drm->dev; struct nv84_fence_priv *priv = chan->drm->fence; struct nv84_fence_chan *fctx = chan->fence; + struct nouveau_fifo_chan *fifo = (void *)chan->object; int i; + nouveau_bo_wr32(priv->bo, fifo->chid * 16/4, fctx->base.sequence); + for (i = 0; i < dev->mode_config.num_crtc; i++) { struct nouveau_bo *bo = nv50_display_crtc_sema(dev, i); nouv...
2013 Nov 12
6
[PATCH 1/7] drm/nouveau: fix m2mf copy to tiled gart
From: Maarten Lankhorst <maarten.lankhorst at canonical.com> Commit de7b7d59d54852c introduced tiled GART, but a linear copy is still performed. This may result in errors on eviction, fix it by checking tiling from memtype. Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com> Cc: stable at vger.kernel.org #3.10+ --- drivers/gpu/drm/nouveau/nouveau_bo.c | 33
2013 Sep 04
0
[PATCH] drm/nv84-: write fence value on exit, and restore value on init.
...drm/nouveau/nv84_fence.c > +++ b/drivers/gpu/drm/nouveau/nv84_fence.c > @@ -122,8 +122,11 @@ nv84_fence_context_del(struct nouveau_channel *chan) > struct drm_device *dev = chan->drm->dev; > struct nv84_fence_priv *priv = chan->drm->fence; > struct nv84_fence_chan *fctx = chan->fence; > + struct nouveau_fifo_chan *fifo = (void *)chan->object; > int i; > > + nouveau_bo_wr32(priv->bo, fifo->chid * 16/4, fctx->base.sequence); > + > for (i = 0; i < dev->mode_config.num_crtc; i++) { >...
2014 Apr 17
0
[PATCH] drm/nouveau: add some basic debugfs dumping for nouveau's clients and vm mappings
...tatic void dump_channel_single(struct seq_file *m, struct nouveau_drm *drm, + struct nouveau_cli *cli, struct nouveau_channel *chan) +{ + struct nouveau_device *device = nv_device(drm->device); + + if (device->chipset >= 0x84) { + struct nv84_fence_priv *priv = drm->fence; + struct nv84_fence_chan *fctx = chan->fence; + int i; + + for (i = 0; i < drm->dev->mode_config.num_crtc; i++) { + struct nouveau_bo *bo = nv50_display_crtc_sema(drm->dev, i); + + dump_single_bo(m, bo, -2, &fctx->dispc_vma[i]); + } + dump_single_bo(m, priv->bo, -3, &fctx->vma); + d...