search for: nv50tic_0_0_typea_unorm

Displaying 7 results from an estimated 7 matches for "nv50tic_0_0_typea_unorm".

2016 Oct 17
2
[PATCH 4/5] nvc0: refactor TIC uploads to allow different specifies per generation
...t; 18); > float X1, X2, Y1, Y2; > BoxPtr pbox; > int nbox; > @@ -105,71 +104,49 @@ nvc0_xv_image_put(ScrnInfoPtr pScrn, > > PUSH_DATAu(push, pNv->scratch, TIC_OFFSET, 16); > if (id == FOURCC_YV12 || id == FOURCC_I420) { > - PUSH_DATA (push, NV50TIC_0_0_MAPA_C0 | NV50TIC_0_0_TYPEA_UNORM | > + PUSH_TIC(push, src, packed_y, width, height, 0, > + NV50TIC_0_0_MAPA_C0 | NV50TIC_0_0_TYPEA_UNORM | > NV50TIC_0_0_MAPB_ZERO | NV50TIC_0_0_TYPEB_UNORM | > NV50TIC_0_0_MAPG_ZERO | NV50TIC_0_0_TYPEG_UNORM | > NV50TIC_0_0_MAPR_ZERO | NV50TIC_0_0_TYPER_UNORM | &gt...
2016 Oct 16
0
[PATCH 4/5] nvc0: refactor TIC uploads to allow different specifies per generation
...(src->config.nvc0.tile_mode << 18); float X1, X2, Y1, Y2; BoxPtr pbox; int nbox; @@ -105,71 +104,49 @@ nvc0_xv_image_put(ScrnInfoPtr pScrn, PUSH_DATAu(push, pNv->scratch, TIC_OFFSET, 16); if (id == FOURCC_YV12 || id == FOURCC_I420) { - PUSH_DATA (push, NV50TIC_0_0_MAPA_C0 | NV50TIC_0_0_TYPEA_UNORM | + PUSH_TIC(push, src, packed_y, width, height, 0, + NV50TIC_0_0_MAPA_C0 | NV50TIC_0_0_TYPEA_UNORM | NV50TIC_0_0_MAPB_ZERO | NV50TIC_0_0_TYPEB_UNORM | NV50TIC_0_0_MAPG_ZERO | NV50TIC_0_0_TYPEG_UNORM | NV50TIC_0_0_MAPR_ZERO | NV50TIC_0_0_TYPER_UNORM | NV50TIC_0_0_FMT_8); - P...
2016 Oct 27
0
[PATCH v2 5/7] nvc0: refactor TIC uploads to allow different specifics per generation
...(src->config.nvc0.tile_mode << 18); float X1, X2, Y1, Y2; BoxPtr pbox; int nbox; @@ -105,71 +104,49 @@ nvc0_xv_image_put(ScrnInfoPtr pScrn, PUSH_DATAu(push, pNv->scratch, TIC_OFFSET, 16); if (id == FOURCC_YV12 || id == FOURCC_I420) { - PUSH_DATA (push, NV50TIC_0_0_MAPA_C0 | NV50TIC_0_0_TYPEA_UNORM | + PUSH_TIC(push, src, packed_y, width, height, 0, + NV50TIC_0_0_MAPA_C0 | NV50TIC_0_0_TYPEA_UNORM | NV50TIC_0_0_MAPB_ZERO | NV50TIC_0_0_TYPEB_UNORM | NV50TIC_0_0_MAPG_ZERO | NV50TIC_0_0_TYPEG_UNORM | NV50TIC_0_0_MAPR_ZERO | NV50TIC_0_0_TYPER_UNORM | NV50TIC_0_0_FMT_8); - P...
2016 Oct 17
0
[PATCH 4/5] nvc0: refactor TIC uploads to allow different specifies per generation
...tr pbox; >> int nbox; >> @@ -105,71 +104,49 @@ nvc0_xv_image_put(ScrnInfoPtr pScrn, >> >> PUSH_DATAu(push, pNv->scratch, TIC_OFFSET, 16); >> if (id == FOURCC_YV12 || id == FOURCC_I420) { >> - PUSH_DATA (push, NV50TIC_0_0_MAPA_C0 | NV50TIC_0_0_TYPEA_UNORM | >> + PUSH_TIC(push, src, packed_y, width, height, 0, >> + NV50TIC_0_0_MAPA_C0 | NV50TIC_0_0_TYPEA_UNORM | >> NV50TIC_0_0_MAPB_ZERO | NV50TIC_0_0_TYPEB_UNORM | >> NV50TIC_0_0_MAPG_ZERO |...
2016 Oct 27
2
[PATCH v2 5/7] nvc0: refactor TIC uploads to allow different specifics per generation
...t; 18); > float X1, X2, Y1, Y2; > BoxPtr pbox; > int nbox; > @@ -105,71 +104,49 @@ nvc0_xv_image_put(ScrnInfoPtr pScrn, > > PUSH_DATAu(push, pNv->scratch, TIC_OFFSET, 16); > if (id == FOURCC_YV12 || id == FOURCC_I420) { > - PUSH_DATA (push, NV50TIC_0_0_MAPA_C0 | NV50TIC_0_0_TYPEA_UNORM | > + PUSH_TIC(push, src, packed_y, width, height, 0, > + NV50TIC_0_0_MAPA_C0 | NV50TIC_0_0_TYPEA_UNORM | > NV50TIC_0_0_MAPB_ZERO | NV50TIC_0_0_TYPEB_UNORM | > NV50TIC_0_0_MAPG_ZERO | NV50TIC_0_0_TYPEG_UNORM | > NV50TIC_0_0_MAPR_ZERO | NV50TIC_0_0_TYPER_UNORM | &gt...
2016 Oct 16
10
[PATCH 1/5] hwdefs: update nvc0_3d, add gm107_texture for new TIC format
These are copied directly from the mesa repository. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/hwdefs/gm107_texture.xml.h | 365 +++++++++++++++++ src/hwdefs/nvc0_3d.xml.h | 867 +++++++++++++++++++++++++---------------- 2 files changed, 892 insertions(+), 340 deletions(-) create mode 100644 src/hwdefs/gm107_texture.xml.h diff --git
2016 Oct 27
11
[PATCH v2 0/7] Add Maxwell support
I believe I've addressed all the feedback from the first time around, and also made fixes necessary for GM20x based on testing results. I believe now it should actually work for all GM10x and GM20x. Further, GP10x should be very easy to add, but without someone to actually test I didn't want to claim support for it. Ilia Mirkin (7): exa: add GM10x acceleration support hwdefs: update