search for: nv50_sor_create

....head = &head917d, .dac = &dac907d, .sor = &sor907d, diff --git a/drm/nouveau/dispnv50/disp.c b/drm/nouveau/dispnv50/disp.c index 1f8bba8f..970dddf6 100644 --- a/drm/nouveau/dispnv50/disp.c +++ b/drm/nouveau/dispnv50/disp.c @@ -1384,7 +1384,8 @@ nv50_sor_func = { }; static int -nv50_sor_create(struct drm_connector *connector, struct dcb_output *dcbe) +nv50_sor_create(struct drm_connector *connector, struct dcb_output *dcbe, + struct nv50_core_caps *caps) { struct nouveau_connector *nv_connector = nouveau_connector(connector); struct nouveau_drm *drm = nouveau_drm(conn...

This is mainly for dropping interlaced modes on DP connectors if the GPU would otherwise display garbage or EVO timesout. It also adds experimental detection of the HDMI clock limit we currently hard limit depending on the GPU generation. Starting with GF110 GPUs, we can retrieve the limit directly from the GPU and may make the hdmimhz parameter obsolete. Testing this series with 2560x1440 or

small update to my last version I sent out. Patches 3-6 are optional and should only improve detecting the max clocks for HDMI and DP, but they didn't underwent big testing and I am a bit concerned, that it might break detecting the DP limits on some boards. Karol Herbst (6): kms/nv50: move nv50_mstm out of the dp union in nouveau_encoder kms/nv50: reject interlaced modes if the hardware

...3 files changed, 26 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c index a3dc2ba19fb2..32a1c4221f1e 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/disp.c +++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c @@ -1714,6 +1714,9 @@ nv50_sor_create(struct drm_connector *connector, struct dcb_output *dcbe) struct nv50_disp *disp = nv50_disp(encoder->dev); struct nvkm_i2c_aux *aux = nvkm_i2c_aux_find(i2c, dcbe->i2c_index); + u32 caps = nvif_rd32(&disp->disp->object, + 0x00640144 + (nv_encoder->or * 8)); +...

...coder.h | 4 ++++ > 3 files changed, 19 insertions(+), 5 deletions(-) > > diff --git a/drm/nouveau/dispnv50/disp.c b/drm/nouveau/dispnv50/disp.c > index fa23d7a2..103433cb 100644 > --- a/drm/nouveau/dispnv50/disp.c > +++ b/drm/nouveau/dispnv50/disp.c > @@ -1433,7 +1433,12 @@ nv50_sor_create(struct drm_connector *connector, struct dcb_output *dcbe, > case DCB_OUTPUT_LVDS: type = DRM_MODE_ENCODER_LVDS; break; > case DCB_OUTPUT_DP: > nv_encoder->dp.no_interlace = caps->sor[or].dp.no_interlace; > + type = DRM_MODE_ENCODER_TMD...

...ouveau/nouveau_encoder.h | 4 ++++ > 3 files changed, 14 insertions(+) > > diff --git a/drm/nouveau/dispnv50/disp.c b/drm/nouveau/dispnv50/disp.c > index 6f41a6a0..3a960664 100644 > --- a/drm/nouveau/dispnv50/disp.c > +++ b/drm/nouveau/dispnv50/disp.c > @@ -1433,7 +1433,12 @@ nv50_sor_create(struct drm_connector *connector, struct dcb_output *dcbe, > case DCB_OUTPUT_LVDS: type = DRM_MODE_ENCODER_LVDS; break; > case DCB_OUTPUT_DP: > nv_encoder->dp.no_interlace = caps->dp[or].no_interlace; > + type = DRM_MODE_ENCODER_TMDS; &...

...uveau_connector.c | 5 +++++ drm/nouveau/nouveau_encoder.h | 4 ++++ 3 files changed, 14 insertions(+) diff --git a/drm/nouveau/dispnv50/disp.c b/drm/nouveau/dispnv50/disp.c index 6f41a6a0..3a960664 100644 --- a/drm/nouveau/dispnv50/disp.c +++ b/drm/nouveau/dispnv50/disp.c @@ -1433,7 +1433,12 @@ nv50_sor_create(struct drm_connector *connector, struct dcb_output *dcbe, case DCB_OUTPUT_LVDS: type = DRM_MODE_ENCODER_LVDS; break; case DCB_OUTPUT_DP: nv_encoder->dp.no_interlace = caps->dp[or].no_interlace; + type = DRM_MODE_ENCODER_TMDS; + break; case DCB_OUTPUT_TMDS: + nv_encoder->tmds.ma...

...+++++----- drm/nouveau/nouveau_encoder.h | 4 ++++ 3 files changed, 19 insertions(+), 5 deletions(-) diff --git a/drm/nouveau/dispnv50/disp.c b/drm/nouveau/dispnv50/disp.c index fa23d7a2..103433cb 100644 --- a/drm/nouveau/dispnv50/disp.c +++ b/drm/nouveau/dispnv50/disp.c @@ -1433,7 +1433,12 @@ nv50_sor_create(struct drm_connector *connector, struct dcb_output *dcbe, case DCB_OUTPUT_LVDS: type = DRM_MODE_ENCODER_LVDS; break; case DCB_OUTPUT_DP: nv_encoder->dp.no_interlace = caps->sor[or].dp.no_interlace; + type = DRM_MODE_ENCODER_TMDS; + break; case DCB_OUTPUT_TMDS: + nv_encoder->tmd...

...- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c index 307584107d77..b46be8a091e9 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/disp.c +++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c @@ -1603,7 +1603,8 @@ nv50_sor_create(struct drm_connector *connector, struct dcb_output *dcbe) nv_encoder->aux = aux; } - if ((data = nvbios_dp_table(bios, &ver, &hdr, &cnt, &len)) && + if (nv_connector->type != DCB_CONNECTOR_eDP && + (data = nvbios_dp_table(bios, &ver, &hd...

...3 files changed, 19 insertions(+), 5 deletions(-) >> >> diff --git a/drm/nouveau/dispnv50/disp.c b/drm/nouveau/dispnv50/disp.c >> index fa23d7a2..103433cb 100644 >> --- a/drm/nouveau/dispnv50/disp.c >> +++ b/drm/nouveau/dispnv50/disp.c >> @@ -1433,7 +1433,12 @@ nv50_sor_create(struct drm_connector *connector, struct dcb_output *dcbe, >> case DCB_OUTPUT_LVDS: type = DRM_MODE_ENCODER_LVDS; break; >> case DCB_OUTPUT_DP: >> nv_encoder->dp.no_interlace = caps->sor[or].dp.no_interlace; >> + type = DRM_...

The patches contain some tidy-up work, and refactoring that has arisen as a by-product of my initial work on adding TV support to nv50. Joel Holdsworth (4): drm/nouveau: Removed unneeded include in nvc0_fence.c drm/nouveau: Replaced magic numbers with defines from nouveau_reg drm/nouveau: Replaced copy-pasted nv_wait with nv50_wait_dpms_ctrl helper drm/nouveau: Refactored encoder

Not entirely sure why this never came up when I originally tested this (maybe some BIOSes already have this setup?) but the ->caps_init vfunc appears to cause the display engine to throw an exception on driver init, at least on my ThinkPad P72: nouveau 0000:01:00.0: disp: chid 0 mthd 008c data 00000000 0000508c 0000102b This is magic nvidia speak for "You need to have the DMA notifier

...ct nouveau_encoder *outp, struct drm_dp_aux *aux, int aux_max, mstm->mgr.cbs = &nv50_mstm; ret = drm_dp_mst_topology_mgr_init(&mstm->mgr, dev, aux, aux_max, - max_payloads, conn_base_id); + max_payloads, connector); if (ret) return ret; @@ -1496,7 +1496,7 @@ nv50_sor_create(struct drm_connector *connector, struct dcb_output *dcbe) if ((data = nvbios_dp_table(bios, &ver, &hdr, &cnt, &len)) && ver >= 0x40 && (nvbios_rd08(bios, data + 0x08) & 0x04)) { ret = nv50_mstm_new(nv_encoder, &nv_connector->aux, 16, -...

This is more or less simplified series of patches that bring power usage on my NV86 close to that of binary blob. Best regards, Maxim Levitsky

...ct nouveau_encoder *outp, struct drm_dp_aux *aux, int aux_max, mstm->mgr.cbs = &nv50_mstm; ret = drm_dp_mst_topology_mgr_init(&mstm->mgr, dev, aux, aux_max, - max_payloads, conn_base_id); + max_payloads, connector); if (ret) return ret; @@ -1496,7 +1496,7 @@ nv50_sor_create(struct drm_connector *connector, struct dcb_output *dcbe) if ((data = nvbios_dp_table(bios, &ver, &hdr, &cnt, &len)) && ver >= 0x40 && (nvbios_rd08(bios, data + 0x08) & 0x04)) { ret = nv50_mstm_new(nv_encoder, &nv_connector->aux, 16, -...

Currently, nouveau doesn't actually bother to try probing whether or not it can actually handle interlaced modes over DisplayPort. As a result, on volta and later we'll end up trying to set an interlaced mode even when it's not supported and cause the front end for the display engine to hang. So, let's teach nouveau to reject interlaced modes on hardware that can't actually

https://bugs.freedesktop.org/show_bug.cgi?id=32406 Summary: nouveau fails to send hotplug event to ALSA hda hdmi audio Product: xorg Version: unspecified Platform: Other OS/Version: All Status: NEW Severity: normal Priority: medium Component: Driver/nouveau AssignedTo: nouveau

Currently, nouveau doesn't actually bother to try probing whether or not it can actually handle interlaced modes over DisplayPort. As a result, on volta and later we'll end up trying to set an interlaced mode even when it's not supported and cause the front end for the display engine to hang. So, let's teach nouveau to reject interlaced modes on hardware that can't actually

These didn't apply cleanly to v5.8, so here's a backported version. Lyude Paul (2): drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps drm/nouveau/kms/nv50-: Log SOR/PIOR caps drivers/gpu/drm/nouveau/dispnv50/core507d.c | 25 ++++++++++++++++----- drivers/gpu/drm/nouveau/dispnv50/disp.c | 10 +++++++++ 2 files changed, 29 insertions(+), 6 deletions(-)

Currently, nouveau doesn't actually bother to try probing whether or not it can actually handle interlaced modes over DisplayPort. As a result, on volta and later we'll end up trying to set an interlaced mode even when it's not supported and cause the front end for the display engine to hang. So, let's teach nouveau to reject interlaced modes on hardware that can't actually