search for: nv50_miptree_cr

...sertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/nouveau/nv50/nv50_miptree.c b/src/gallium/drivers/nouveau/nv50/nv50_miptree.c index 513d8f9..6c6ef4e 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_miptree.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_miptree.c @@ -329,13 +329,13 @@ nv50_miptree_create(struct pipe_screen *pscreen, if (pt->bind & PIPE_BIND_LINEAR) pt->flags |= NOUVEAU_RESOURCE_FLAG_LINEAR; - bo_config.nv50.memtype = nv50_mt_choose_storage_type(mt, TRUE); - if (!nv50_miptree_init_ms_mode(mt)) { FREE(mt); return NULL; } + bo_con...

On 03.01.2015 00:20, Ilia Mirkin wrote: > On Fri, Jan 2, 2015 at 6:09 PM, Tobias Klausmann > <tobias.johannes.klausmann at mni.thm.de> wrote: >> We enable compression only for some supported formats >> >> Suggested-by: Ilia Mirkin <imirkin at alum.mit.edu> >> Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> >> ---

...icit-function-declaration -Werror=missing-prototypes -fno-strict-aliasing -fno-math-errno -fno-trapping-math -fno-builtin-memcmp -MT nv50/nv50_push.lo -MD -MP -MF $depbase.Tpo -c -o nv50/nv50_push.lo nv50/nv50_push.c &&\ mv -f $depbase.Tpo $depbase.Plo nv50/nv50_miptree.c: In function 'nv50_miptree_create': nv50/nv50_miptree.c:342:25: error: dereferencing pointer to incomplete type bool compressed = drm->version >= 0x01000101; ^ Makefile:1251: recipe for target 'nv50/nv50_miptree.lo' failed make[3]: *** [nv50/nv50_miptree.lo] Error 1 -- You are re...

This series is to allow NVIDIA chips with shared memory to operate more efficiently (and to operate at all once we disable VRAM from the kernel driver) by allowing nouveau_screen to specify a domain to use for objects originally allocated into VRAM. If the domain is not overridden, the default NOUVEAU_BO_VRAM is used. A NV_VRAM_DOMAIN() macro is then introduced to be used in place of

...n = NOUVEAU_BO_GART; diff --git a/src/gallium/drivers/nouveau/nv50/nv50_miptree.c b/src/gallium/drivers/nouveau/nv50/nv50_miptree.c index 1aacaec89acf..ddff508c475c 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_miptree.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_miptree.c @@ -359,7 +359,7 @@ nv50_miptree_create(struct pipe_screen *pscreen, if (!bo_config.nv50.memtype && (pt->bind & PIPE_BIND_SHARED)) mt->base.domain = NOUVEAU_BO_GART; else - mt->base.domain = NOUVEAU_BO_VRAM; + mt->base.domain = NV_VRAM_DOMAIN(nouveau_screen(pscreen)); bo_flags =...

...diff --git a/src/gallium/drivers/nouveau/nv50/nv50_miptree.c b/src/gallium/drivers/nouveau/nv50/nv50_miptree.c > index 1aacaec89acf..ddff508c475c 100644 > --- a/src/gallium/drivers/nouveau/nv50/nv50_miptree.c > +++ b/src/gallium/drivers/nouveau/nv50/nv50_miptree.c > @@ -359,7 +359,7 @@ nv50_miptree_create(struct pipe_screen *pscreen, > if (!bo_config.nv50.memtype && (pt->bind & PIPE_BIND_SHARED)) > mt->base.domain = NOUVEAU_BO_GART; > else > - mt->base.domain = NOUVEAU_BO_VRAM; > + mt->base.domain = NV_VRAM_DOMAIN(nouveau_screen(...

...diff --git a/src/gallium/drivers/nouveau/nv50/nv50_miptree.c b/src/gallium/drivers/nouveau/nv50/nv50_miptree.c > index 1aacaec89acf..ddff508c475c 100644 > --- a/src/gallium/drivers/nouveau/nv50/nv50_miptree.c > +++ b/src/gallium/drivers/nouveau/nv50/nv50_miptree.c > @@ -359,7 +359,7 @@ nv50_miptree_create(struct pipe_screen *pscreen, > if (!bo_config.nv50.memtype && (pt->bind & PIPE_BIND_SHARED)) > mt->base.domain = NOUVEAU_BO_GART; > else > - mt->base.domain = NOUVEAU_BO_VRAM; > + mt->base.domain = NV_VRAM_DOMAIN(nouveau_screen(psc...

...passed to resource_create(): $2 = {reference = {count = 0}, width0 = 300, height0 = 300, depth0 = 1, array_size = 1, format = PIPE_FORMAT_Z24X8_UNORM, target = PIPE_TEXTURE_2D, last_level = 0, nr_samples = 0, nr_storage_samples = 0, usage = 0, bind = 1, flags = 0, next = 0x0, screen = 0x0} In nv50_miptree_create() in gallium/drivers/nouveau/nv50/nv50_miptree.c:389 the call to nouveau_bo_new() returns -22 that causes it to return NULL. MESA_DEBUG=1 glxgears prints the following before segfaulting: Mesa: User error: GL_OUT_OF_MEMORY in Resizing framebuffer Computer: MacBook Pro 2010 (NVIDIA GeForce 32...

This series is to allow NVIDIA chips with shared memory to operate more efficiently (and to operate at all once we disable VRAM from the kernel driver) by allowing nouveau_screen to specify a domain to use for objects originally allocated into VRAM. If the domain is not overridden, the default NOUVEAU_BO_VRAM is used. A NV_VRAM_DOMAIN() macro is then introduced to be used in place of

New revision of this patchset that prevents VRAM objects from being allocated on VRAM-less systems like Tegra. This is required for Mesa to work on such systems. Changes since v2: - Use vram_size to detect systems without VRAM and set the correct domain instead of expecting each chip to set its domain explicitly. Alexandre Courbot (2): nouveau: support for custom VRAM domains nvc0: use

From: Ben Skeggs <bskeggs at redhat.com> Signed-off-by: Ben Skeggs <bskeggs at redhat.com> --- configure.ac | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configure.ac b/configure.ac index 4016871..c02ee61 100644 --- a/configure.ac +++ b/configure.ac @@ -73,7 +73,7 @@ LIBDRM_RADEON_REQUIRED=2.4.56 LIBDRM_AMDGPU_REQUIRED=2.4.63 LIBDRM_INTEL_REQUIRED=2.4.61

From: Ben Skeggs <bskeggs at redhat.com> v2. forgot bump for non-gallium driver Signed-off-by: Ben Skeggs <bskeggs at redhat.com> --- configure.ac | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/configure.ac b/configure.ac index b6680d0..965c6f7 100644 --- a/configure.ac +++ b/configure.ac @@ -72,8 +72,8 @@ LIBDRM_REQUIRED=2.4.60

From: Ben Skeggs <bskeggs at redhat.com> Signed-off-by: Ben Skeggs <bskeggs at redhat.com> --- configure.ac | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configure.ac b/configure.ac index 4016871..c02ee61 100644 --- a/configure.ac +++ b/configure.ac @@ -73,7 +73,7 @@ LIBDRM_RADEON_REQUIRED=2.4.56 LIBDRM_AMDGPU_REQUIRED=2.4.63 LIBDRM_INTEL_REQUIRED=2.4.61

...mt->layer_stride = align(mt->total_size, NV50_TILE_SIZE(0x20)); + mt->total_size = mt->layer_stride * pt->array_size; + } +} + +static void nv50_miptree_init_layout_tiled(struct nv50_miptree *mt) { struct pipe_resource *pt = &mt->base.base; @@ -311,6 +333,11 @@ nv50_miptree_create(struct pipe_screen *pscreen, return NULL; } + if (unlikely(pt->flags & NV50_RESOURCE_FLAG_VIDEO)) { + nv50_miptree_init_layout_video(mt); + /* BO allocation done by client */ + return pt; + } else if (bo_config.nv50.memtype != 0) { nv50_miptree_...

...mt->layer_stride = align(mt->total_size, NV50_TILE_SIZE(0x20)); + mt->total_size = mt->layer_stride * pt->array_size; + } +} + +static void nv50_miptree_init_layout_tiled(struct nv50_miptree *mt) { struct pipe_resource *pt = &mt->base.base; @@ -311,6 +333,11 @@ nv50_miptree_create(struct pipe_screen *pscreen, return NULL; } + if (unlikely(pt->flags & NV50_RESOURCE_FLAG_VIDEO)) { + nv50_miptree_init_layout_video(mt); + /* BO allocation done by client */ + return pt; + } else if (bo_config.nv50.memtype != 0) { nv50_miptree_...

As it turns out, with the proprietary firmware, the VP3 and VP4 interfaces are identical. Furthermore, this is all already implemented for nvc0. So these patches (a) move the easily sharable bits of the nvc0 implementation into the nouveau directory, and then (b) implement the other parts in nv50. The non-shared parts are still largely copies, but there are some differences, not the least of which