search for: nv50_ir_emit_nv50

On 8 July 2015 at 19:27, Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> wrote: > codegen/nv50_ir_emit_nv50.cpp: In member function > ‘void nv50_ir::CodeEmitterNV50::emitLOAD(const nv50_ir::Instruction*)’: > codegen/nv50_ir_emit_nv50.cpp:620:12: warning: unused variable ‘offset’ > [-Wunused-variable] > int32_t offset = i->getSrc(0)->reg.data.offset; > > Signed-off-by: Tobias...

nouveau_compiler.c: In function ‘main’: nouveau_compiler.c:216:27: warning: ‘code’ may be used uninitialized in this function [-Wmaybe-uninitialized] printf("%08x ", code[i / 4]); ^ nouveau_compiler.c:215:4: warning: ‘size’ may be used uninitialized in this function [-Wmaybe-uninitialized] for (i = 0; i < size; i += 4) { Signed-off-by: Tobias

https://bugs.freedesktop.org/show_bug.cgi?id=69155 Priority: medium Bug ID: 69155 Assignee: nouveau at lists.freedesktop.org Summary: codegen/nv50_ir_emit_nv50.cpp:169:srcAddr8: Assertion `(offset <= 0x1fc || offset == 0x3fc) && !(offset & 0x3)' failed. Severity: critical Classification: Unclassified OS: Linux (All) Reporter: vlee at freedesktop.org...

...ags for MAD 4-byte opcodes, and get rid of some of the constraints. Obviously tested with a wide variety of shaders. V2: Document MAD as supported short form V3: Split up IMM from short-form modifiers Signed-off-by: Roy Spliet <rspliet at eclipso.eu> --- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 10 ++++------ src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 4 ++-- 2 files changed, 6 insertions(+), 8 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp index 2077388..23e4bab 1...

...> > On Sat, Jan 10, 2015 at 7:22 PM, Roy Spliet <rspliet at eclipso.eu> wrote: >> MAD IMM has a very specific SDST == SSRC2 requirement, so don't emit >> >> Signed-off-by: Roy Spliet <rspliet at eclipso.eu> >> --- >> .../drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 18 ++++++++++++------ >> .../drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 2 +- >> 2 files changed, 13 insertions(+), 7 deletions(-) >> >> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50...

MAD IMM has a very specific SDST == SSRC2 requirement, so don't emit Signed-off-by: Roy Spliet <rspliet at eclipso.eu> --- .../drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 18 ++++++++++++------ .../drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 2 +- 2 files changed, 13 insertions(+), 7 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp index 2077388..b1e7...

...MAD has a very specific SDST == SSRC2 requirement, and since MAD IMM is short notation + 4-byte immediate, don't have the compiler create MAD IMM instructions yet. V2: Document MAD as supported short form Signed-off-by: Roy Spliet <rspliet at eclipso.eu> --- .../drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 18 ++++++++++++------ .../drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 4 ++-- 2 files changed, 14 insertions(+), 8 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp index 2077388..b1...

...-texture-gather branch. Ran piglit with -t gather, passed all 1057 tests. Can't say I fully understand what all the arguments to handleTEX in the Coverter are but... seems to work. Will probably require some care for nvc0 support which should have SM5 caps. src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 3 ++- src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 4 ++++ src/gallium/drivers/nouveau/nv50/nv50_screen.c | 3 ++- 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp b/src/gallium/drivers/nouveau/...

Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=86618 Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp index 077eba8..3048f3d 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp +++ b/src/gallium/drivers/nou...

Signed-off-by: Roy Spliet <rspliet at eclipso.eu> --- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 6 ++++++ src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 2 +- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp index 3048f3d..2077388 100644 ---...

...but the changelog needs work. On Sat, Jan 10, 2015 at 7:22 PM, Roy Spliet <rspliet at eclipso.eu> wrote: > MAD IMM has a very specific SDST == SSRC2 requirement, so don't emit > > Signed-off-by: Roy Spliet <rspliet at eclipso.eu> > --- > .../drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 18 ++++++++++++------ > .../drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 2 +- > 2 files changed, 13 insertions(+), 7 deletions(-) > > diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp...

....mit.edu> --- Note: this applies on top of airlied's r600g-texture-gather branch. Appears to pass all 4 piglit tests. The conversion from what the instruction outputs is the same as what the blob does. src/gallium/drivers/nouveau/codegen/nv50_ir.h | 1 + .../drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 4 ++++ .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 3 +++ .../nouveau/codegen/nv50_ir_lowering_nv50.cpp | 23 ++++++++++++++++++++++ .../drivers/nouveau/codegen/nv50_ir_print.cpp | 1 + src/gallium/drivers/nouveau/nv50/nv50_screen.c | 2 +- 6 files changed, 33 ins...

V2: clarify code, commit msgs, add comments. Drop code to was supposed to make register assignment prefer SDST == SRC2 (patch 2) for now, because it didn't quite do what I intended.

...implementation nv50: add support for textureFetch'ing MS textures, ARB_texture_multisample nv50: report glsl 1.50 now that gp tests pass nv50: enable seamless cube maps on all hw for OpenGL 3.2 src/gallium/drivers/nouveau/codegen/nv50_ir.h | 9 ++ .../drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 92 ++++++++++-- .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 41 ++++-- .../nouveau/codegen/nv50_ir_lowering_nv50.cpp | 164 ++++++++++++++++++++- .../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 7 + .../drivers/nouveau/codegen/nv50_ir_print.cpp | 1 + .../nouve...

...Goede <hdegoede at redhat.com> > --- > src/gallium/drivers/nouveau/codegen/nv50_ir.h | 1 + > .../drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 31 +++++++++++++++++----- > .../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 5 +++- > .../drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 10 ++++--- > .../drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 26 +++++++++++++----- > .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 14 +++++++--- > .../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 5 +++- > .../drivers/nouveau/codegen/nv50_ir_print.cpp...

...ops. Signed-off-by: Hans de Goede <hdegoede at redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir.h | 1 + .../drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 31 +++++++++++++++++----- .../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 5 +++- .../drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 10 ++++--- .../drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 26 +++++++++++++----- .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 14 +++++++--- .../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 5 +++- .../drivers/nouveau/codegen/nv50_ir_print.cpp | 1 + .../nouveau/cod...

tgsi_default_instruction_memory / tgsi_build_instruction_memory were returning uninitialized memory for tgsi_instruction_memory.Texture and tgsi_instruction_memory.Format. Note 0 means not set, and thus is a correct default initializer for these. Fixes: 3243b6fc97 ("tgsi: add Texture and Format to tgsi_instruction_memory") Cc: Nicolai Hähnle <nicolai.haehnle at amd.com>

...om> > --- > src/gallium/drivers/nouveau/codegen/nv50_ir.h | 2 +- > src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 10 > +++++----- > src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 6 +++--- > src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 10 > +++++----- > src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 12 > ++++++------ > src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 8 ++++---- > .../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 10 > +++++----- > src/ga...

...t redhat.com> >> --- >> src/gallium/drivers/nouveau/codegen/nv50_ir.h | 1 + >> .../drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 31 +++++++++++++++++----- >> .../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 5 +++- >> .../drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 10 ++++--- >> .../drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 26 +++++++++++++----- >> .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 14 +++++++--- >> .../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 5 +++- >> .../drivers/nouveau/codegen/nv50_i...

...Goede <hdegoede at redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir.h | 2 +- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 10 +++++----- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 6 +++--- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 10 +++++----- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 12 ++++++------ src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 8 ++++---- .../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 10 +++++----- src/gallium/drivers/nouveau/codegen/nv50_...