search for: nv50_ir_emit_gk110

Should fix SGE/SSG instructions, which were previously getting integer 0/-1 values. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp index 5992c54..b8d0d3e 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp +++ b/src/gallium/drivers...

Information for this was gathered from nvdisasm. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- Entirely untested. Ben, do you think you'll be able to give this a shot? .../drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 33 +++++++++++----------- 1 file changed, 16 insertions(+), 17 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp index fe428ca..84f4413 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_em...

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> Cc: "10.2" <mesa-stable at lists.freedestkop.org> --- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp index b8d0d3e..d566c99 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp +++ b/src/ga...

Make the store offset handling in CodeEmitterGK110::emitSTORE identical to the one in CodeEmitterGK110::emitLOAD handling. This is just a cleanup, it does not cause any functional changes. Signed-off-by: Hans de Goede <hdegoede at redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp index 0d7d95e..70f3c3f 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp +++ b/src...

...ered from nvdisasm. > > Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> > --- > > Entirely untested. Ben, do you think you'll be able to give this a shot? I'll try and take a moment in the next couple of days to give it a go. > > .../drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 33 +++++++++++----------- > 1 file changed, 16 insertions(+), 17 deletions(-) > > diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp > index fe428ca..84f4413 100644 > --- a/src/gallium/drivers/no...

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- Pretty sure there's nothing wrong with it, but it looks odd in the code. src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 2 ++ src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 7 +++++-- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 2 ++ 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp b/src/gallium/drivers/nouv...

...e that it seems to use 8 bits for offsets, vs 4 bits used by texelFetch. But this passes the piglit tests. Will test on a NVCX before checking in, in case it's different there. (Although that'd be surprising, given the similarities between the 2 ISAs.) src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 13 +++++++++++-- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 1 + .../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 10 ++++++++-- src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 3 ++- 4 files changed, 22 insertions(+), 5 deletions(-) diff --g...

tgsi_default_instruction_memory / tgsi_build_instruction_memory were returning uninitialized memory for tgsi_instruction_memory.Texture and tgsi_instruction_memory.Format. Note 0 means not set, and thus is a correct default initializer for these. Fixes: 3243b6fc97 ("tgsi: add Texture and Format to tgsi_instruction_memory") Cc: Nicolai Hähnle <nicolai.haehnle at amd.com>

...s, note this has only > been tested with regular load and stores and likely needs more work > for e.g. atomic ops. > > Signed-off-by: Hans de Goede <hdegoede at redhat.com> > --- > src/gallium/drivers/nouveau/codegen/nv50_ir.h | 1 + > .../drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 31 +++++++++++++++++----- > .../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 5 +++- > .../drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 10 ++++--- > .../drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 26 +++++++++++++----- > .../drivers/nouveau/codegen/nv50_ir_fro...

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- .../drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 66 +++++++++++++++++++++- 1 file changed, 63 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp index dfb093c..e38a3b8 100644 ---

...port for OpenCL global memory buffers, note this has only been tested with regular load and stores and likely needs more work for e.g. atomic ops. Signed-off-by: Hans de Goede <hdegoede at redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir.h | 1 + .../drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 31 +++++++++++++++++----- .../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 5 +++- .../drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 10 ++++--- .../drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 26 +++++++++++++----- .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 14 +++++++...

...ion, just minor things. Karol Herbst (5): nv50/ir: restructure and rename postraconstantfolding pass nv50/ir: implement mad post ra folding for nvc0+ gk110/ir: add LIMM form of mad gm107/ir: add LIMM form of mad nv50/ir: also do PostRaLoadPropagation for FMA .../drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 50 ++++--- .../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 34 +++-- .../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 162 +++++++++++++-------- src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 2 +- 4 files changed, 164 insertions(+), 84 deletions(-) -- 2.12.0

...handling, this will allow the later (re-)addition > of FILE_MEMORY_GLOBAL for regular global memory. > > Signed-off-by: Hans de Goede <hdegoede at redhat.com> > --- > src/gallium/drivers/nouveau/codegen/nv50_ir.h | 2 +- > src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 10 > +++++----- > src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 6 +++--- > src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 10 > +++++----- > src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 12 > ++++++------ > src/galli...

Some shaders appear to extract bits using shift/and combos. Detect (some) of those and convert to EXTBF instead. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- .../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 66 +++++++++++++++------- 1 file changed, 46 insertions(+), 20 deletions(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp

...t; been tested with regular load and stores and likely needs more work >> for e.g. atomic ops. >> >> Signed-off-by: Hans de Goede <hdegoede at redhat.com> >> --- >> src/gallium/drivers/nouveau/codegen/nv50_ir.h | 1 + >> .../drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 31 +++++++++++++++++----- >> .../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 5 +++- >> .../drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 10 ++++--- >> .../drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 26 +++++++++++++----- >> .../drivers/nouveau/cod...

...e current code is for buffer handling, this will allow the later (re-)addition of FILE_MEMORY_GLOBAL for regular global memory. Signed-off-by: Hans de Goede <hdegoede at redhat.com> --- src/gallium/drivers/nouveau/codegen/nv50_ir.h | 2 +- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 10 +++++----- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 6 +++--- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 10 +++++----- src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 12 ++++++------ src/gallium/drivers/nouveau/codegen/nv50_ir_...

...the later (re-)addition >> of FILE_MEMORY_GLOBAL for regular global memory. >> >> Signed-off-by: Hans de Goede <hdegoede at redhat.com> >> --- >> src/gallium/drivers/nouveau/codegen/nv50_ir.h | 2 +- >> src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 10 >> +++++----- >> src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 6 +++--- >> src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 10 >> +++++----- >> src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 12 >> +...

https://bugs.freedesktop.org/show_bug.cgi?id=70326 Priority: medium Bug ID: 70326 Assignee: nouveau at lists.freedesktop.org Summary: [NVF0] Kernel/Driver fails to initialize acceleration on GTX Titan QA Contact: xorg-team at lists.x.org Severity: normal Classification: Unclassified OS: Linux