Displaying 8 results from an estimated 8 matches for "nv50_graph_priv".
2014 Jan 16
2
[PATCH] drm/nv50/graph: add more trap names to print on error
..._STORAGE_TYPE_MISMATCH" },
+ { 0x00000200, "ZETA_STORAGE_TYPE_MISMATCH" },
+ { 0x00000400, "RT_STORAGE_TYPE_MISMATCH" },
+ { 0x00000800, "DST2D_LINEAR_MISMATCH" },
+ { 0x00001000, "RT_LINEAR_MISMATCH" },
+ {}
+};
+
+static u32
+nv50_priv_prop_trap(struct nv50_graph_priv *priv,
+ u32 ustatus_addr, u32 ustatus, u32 tp)
+{
+ u32 e0c = nv_rd32(priv, ustatus_addr + 0x04);
+ u32 e10 = nv_rd32(priv, ustatus_addr + 0x08);
+ u32 e14 = nv_rd32(priv, ustatus_addr + 0x0c);
+ u32 e18 = nv_rd32(priv, ustatus_addr + 0x10);
+ u32 e1c = nv_rd32(priv, ustatus_addr + 0x14);
+ u...
2014 Jan 16
0
[PATCH] drm/nv50/graph: add more trap names to print on error
...GE_TYPE_MISMATCH" },
> + { 0x00000400, "RT_STORAGE_TYPE_MISMATCH" },
> + { 0x00000800, "DST2D_LINEAR_MISMATCH" },
> + { 0x00001000, "RT_LINEAR_MISMATCH" },
> + {}
> +};
> +
> +static u32
> +nv50_priv_prop_trap(struct nv50_graph_priv *priv,
> + u32 ustatus_addr, u32 ustatus, u32 tp)
> +{
> + u32 e0c = nv_rd32(priv, ustatus_addr + 0x04);
> + u32 e10 = nv_rd32(priv, ustatus_addr + 0x08);
> + u32 e14 = nv_rd32(priv, ustatus_addr + 0x0c);
> + u32 e18 = nv_rd32(priv, ustatu...
2014 Feb 09
1
[PATCH] drm/nv50/gr: add missing nv_error parameter priv
...diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c b/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
index 6da473c..ef38320 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nv50.c
@@ -540,7 +540,7 @@ nv50_priv_tp_trap(struct nv50_graph_priv *priv, int type, u32 ustatus_old,
ustatus &= ~0x04030000;
}
if (ustatus && display) {
- nv_error("%s - TP%d:", name, i);
+ nv_error(priv, "%s - TP%d:", name, i);
nouveau_bitfield_print(nv50_mpc_traps, ustatus);
pr_cont("\n");...
2014 Jan 17
0
[PATCH] drm/nv50/graph: update list of mp errors, make it a bitfield
...UNDERFLOW" },
+ { 0x02, "STACK_MISMATCH" },
+ { 0x04, "QUADON_ACTIVE" },
+ { 0x08, "TIMEOUT" },
+ { 0x10, "INVALID_OPCODE" },
+ { 0x20, "PM_OVERFLOW" },
+ { 0x40, "BREAKPOINT" },
{}
};
@@ -474,8 +476,8 @@ nv50_priv_mp_trap(struct nv50_graph_priv *priv, int tpid, int display)
oplow = nv_rd32(priv, addr + 0x70);
ophigh = nv_rd32(priv, addr + 0x74);
nv_error(priv, "TRAP_MP_EXEC - "
- "TP %d MP %d: ", tpid, i);
- nouveau_enum_print(nv50_mp_exec_error_names, status);
+ "TP %d MP %d:", tpid, i)...
2014 Jan 17
0
[PATCH] drm/nv50/graph: print mpc trap name when it's not an mp trap
...OBAL_LIMIT_RED" },
+ { 0x0400000, "GLOBAL_LIMIT_ATOM" },
+ { 0x4000000, "MP2" },
+ {}
+};
+
static const struct nouveau_bitfield nv50_graph_trap_m2mf[] = {
{ 0x00000001, "NOTIFY" },
{ 0x00000002, "IN" },
@@ -524,6 +538,12 @@ nv50_priv_tp_trap(struct nv50_graph_priv *priv, int type, u32 ustatus_old,
nv50_priv_mp_trap(priv, i, display);
ustatus &= ~0x04030000;
}
+ if (ustatus && display) {
+ nv_error("%s - TP%d:", name, i);
+ nouveau_bitfield_print(nv50_mpc_traps, ustatus);
+ pr_cont("\n");
+ ustatus =...
2014 Feb 14
0
[PATCH] drm/nv50/gr: decode texture trap status code
...ATCH" },
+ { 0x00000008, "LINEAR_MISMATCH" },
+ { 0x00000020, "WRONG_MEMTYPE" },
+ {}
+};
+
static const struct nouveau_bitfield nv50_graph_trap_m2mf[] = {
{ 0x00000001, "NOTIFY" },
{ 0x00000002, "IN" },
@@ -532,6 +541,13 @@ nv50_priv_tp_trap(struct nv50_graph_priv *priv, int type, u32 ustatus_old,
for (r = ustatus_addr + 4; r <= ustatus_addr + 0x10; r += 4)
nv_error(priv, "\t0x%08x: 0x%08x\n", r,
nv_rd32(priv, r));
+ if (ustatus) {
+ nv_error(priv, "%s - TP%d:", name, i);
+ nouveau_bitfield_print(nv50_tex_t...
2012 Nov 06
1
[PATCH] drm/nv50: decode PGRAPH status registers on TLB flush fail
Now it outputs:
nouveau E[ PGRAPH][0000:02:00.0] PGRAPH TLB flush idle timeout fail
nouveau E[ PGRAPH][0000:02:00.0] PGRAPH_STATUS: BUSY DISPATCH VFETCH CCACHE_UNK4 STRMOUT_GSCHED_UNK5 UNK14XX UNK1CXX CLIPID ZCULL ENG2D UNK34XX TPRAST TPROP ROP (0x011fde03)
nouveau E[ PGRAPH][0000:02:00.0] PGRAPH_VSTATUS: CCACHE (0x00145b4d) (0x0000002d) ENG2D ROP (0x0034db40)
instead of:
[drm] nouveau
2013 Mar 27
3
[PATCH 1/4] drm/nvc0: implement VRAM compression
---
drivers/gpu/drm/nouveau/core/include/subdev/ltcg.h | 7 +
drivers/gpu/drm/nouveau/core/subdev/fb/nvc0.c | 55 +++++----
drivers/gpu/drm/nouveau/core/subdev/ltcg/nvc0.c | 129 +++++++++++++++++++-
drivers/gpu/drm/nouveau/core/subdev/vm/nvc0.c | 58 +++++++++-
4 files changed, 220 insertions(+), 29 deletions(-)
diff --git