search for: nv50_gpio_reset

Displaying 4 results from an estimated 4 matches for "nv50_gpio_reset".

2014 Sep 08
1
[PATCH] gpio: rename g92 class to g94
...ouveau_ofuncs) { - .ctor = _nouveau_gpio_ctor, - .dtor = _nouveau_gpio_dtor, - .init = _nouveau_gpio_init, - .fini = _nouveau_gpio_fini, - }, - .lines = 32, - .intr_stat = nv92_gpio_intr_stat, - .intr_mask = nv92_gpio_intr_mask, - .drive = nv50_gpio_drive, - .sense = nv50_gpio_sense, - .reset = nv50_gpio_reset, -}.base; diff --git a/nvkm/subdev/gpio/nv94.c b/nvkm/subdev/gpio/nv94.c new file mode 100644 index 0000000..cae404c --- /dev/null +++ b/nvkm/subdev/gpio/nv94.c @@ -0,0 +1,74 @@ +/* + * Copyright 2012 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * c...
2012 Sep 13
1
[PATCH] drm/nouveau: POST the card before GPIO initialization
...ad the idea to add msleep(10000) at the beginning of nouveau_drm_resume and voila! I could see Nouveau resuming. 7) ... But I still couldn't see debugging messages (only KERN_INFO and above), so I patched nv_printk to emit all debugging messages on KERN_INFO level. 8) I checked all variables in nv50_gpio_reset to see if dcb entries are calculated correctly - they were. 9) At this point my S/R counter reached ~40, so I started to wonder how to debug it without actually doing S/R. So I came up with an idea of booting with NvForcePost=1. With all debugging messages reaching console I hit what turned out to...
2015 Sep 29
10
All-round reclocking improvements
In bulletpoints: - Add some support for G94 and G96 reclocking. Has been tested on literally two cards, which is hardly adequate as "full coverage". On the other hand, the changes were small enough to make me confident this might work for others as well. - Fix NV50 wait for VBLANK when no monitor is plugged in. - Voltage related inprovements for GT21x. - Slightly improve Keplers
2014 Sep 29
18
Implement reclocking for DDR2, DDR3, GDDR3
Following a series of patches that implement memory reclocking for NVA3/5/8 with DDR2, DDR3 and GDDR3 on board. I tested these patches on 6 different graphics cards, but I expect reclocking now to work on many more. Testers can pick up these patches and test it by enabling pstate (nouveau.pstate=1). They should then be able to change clocks by writing to /sys/class/drm/card0/device/pstate. Correct