Displaying 5 results from an estimated 5 matches for "nv50_disp_sync".
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nv50_disp_func
2020 Sep 01
3
[PATCH v3] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
....head = &head917d,
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.h b/drivers/gpu/drm/nouveau/dispnv50/disp.h
index 92bddc0836171..a59051bd070d7 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.h
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.h
@@ -16,6 +16,8 @@ struct nv50_disp {
#define NV50_DISP_SYNC(c, o) ((c) * 0x040 + (o))
#define NV50_DISP_CORE_NTFY NV50_DISP_SYNC(0 , 0x00)
+#define NV50_DISP_CAPS_NTFY1 NV50_DISP_SYNC(0 , 0x01)
+#define NV50_DISP_CAPS_NTFY4 NV50_DISP_SYNC(0 , 0x04)...
2020 Sep 01
0
[PATCH v4] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
....head = &head917d,
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.h b/drivers/gpu/drm/nouveau/dispnv50/disp.h
index 92bddc0836171..a59051bd070d7 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.h
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.h
@@ -16,6 +16,8 @@ struct nv50_disp {
#define NV50_DISP_SYNC(c, o) ((c) * 0x040 + (o))
#define NV50_DISP_CORE_NTFY NV50_DISP_SYNC(0 , 0x00)
+#define NV50_DISP_CAPS_NTFY1 NV50_DISP_SYNC(0 , 0x01)
+#define NV50_DISP_CAPS_NTFY4 NV50_DISP_SYNC(0 , 0x04)...
2020 Aug 24
4
[PATCH 0/2] drm/nouveau: Backport SOR/PIOR probing fixes for v5.8
These didn't apply cleanly to v5.8, so here's a backported version.
Lyude Paul (2):
drm/nouveau/kms/nv50-: Program notifier offset before requesting disp
caps
drm/nouveau/kms/nv50-: Log SOR/PIOR caps
drivers/gpu/drm/nouveau/dispnv50/core507d.c | 25 ++++++++++++++++-----
drivers/gpu/drm/nouveau/dispnv50/disp.c | 10 +++++++++
2 files changed, 29 insertions(+), 6 deletions(-)
2020 Feb 14
5
[PATCH v2 0/5] drm/nouveau: DP interlace fixes
Currently, nouveau doesn't actually bother to try probing whether or not
it can actually handle interlaced modes over DisplayPort. As a result,
on volta and later we'll end up trying to set an interlaced mode even
when it's not supported and cause the front end for the display engine
to hang.
So, let's teach nouveau to reject interlaced modes on hardware that
can't actually
2020 May 11
6
[PATCH v3 0/5] drm/nouveau: DP interlace fixes
Currently, nouveau doesn't actually bother to try probing whether or not
it can actually handle interlaced modes over DisplayPort. As a result,
on volta and later we'll end up trying to set an interlaced mode even
when it's not supported and cause the front end for the display engine
to hang.
So, let's teach nouveau to reject interlaced modes on hardware that
can't actually