Displaying 17 results from an estimated 17 matches for "nv50_crtc_mode_set".
2011 Oct 10
2
2 remaining patches in my patch queue that can be merged
Hi,
Here I post these 2 misc patches.
Best regards,
	Maxim Levitsky
2014 Oct 30
2
[PATCH] nv50/disp: Fix modeset on G94
...ck(push, mast);
>> +
>> +       return 0;
>> +}
>> +
>> +static int
>>  nv50_crtc_set_color_vibrance(struct nouveau_crtc *nv_crtc, bool update)
>>  {
>>         struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev);
>> @@ -1104,14 +1121,14 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode,
>>                         evo_mthd(push, 0x0804 + (nv_crtc->index * 0x400), 2);
>>                         evo_data(push, 0x00800000 | mode->clock);
>>                         evo_data(push, (ilace == 2) ? 2 : 0);
>&...
2014 Sep 05
1
[PATCH 1/8] nv50/display: Set VBLANK time in modeset script
...d, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
> index 4c534b7..cfa7ecf 100644
> --- a/drivers/gpu/drm/nouveau/nv50_display.c
> +++ b/drivers/gpu/drm/nouveau/nv50_display.c
> @@ -1070,7 +1070,7 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode,
>         u32 vscan = (mode->flags & DRM_MODE_FLAG_DBLSCAN) ? 2 : 1;
>         u32 hactive, hsynce, hbackp, hfrontp, hblanke, hblanks;
>         u32 vactive, vsynce, vbackp, vfrontp, vblanke, vblanks;
> -       u32 vblan2e =...
2014 Oct 30
2
[PATCH] nv50/disp: Fix modeset on G94
...+
+	evo_mthd(push, 0x0828 + (nv_crtc->index * 0x400), 1);
+	evo_data(push, usec);
+	evo_kick(push, mast);
+
+	return 0;
+}
+
+static int
 nv50_crtc_set_color_vibrance(struct nouveau_crtc *nv_crtc, bool update)
 {
 	struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev);
@@ -1104,14 +1121,14 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode,
 			evo_mthd(push, 0x0804 + (nv_crtc->index * 0x400), 2);
 			evo_data(push, 0x00800000 | mode->clock);
 			evo_data(push, (ilace == 2) ? 2 : 0);
-			evo_mthd(push, 0x0810 + (nv_crtc->index * 0x400), 8);
+			evo_mthd(push, 0x0810 + (nv...
2014 Sep 04
0
[PATCH 1/8] nv50/display: Set VBLANK time in modeset script
...2 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index 4c534b7..cfa7ecf 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -1070,7 +1070,7 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode,
 	u32 vscan = (mode->flags & DRM_MODE_FLAG_DBLSCAN) ? 2 : 1;
 	u32 hactive, hsynce, hbackp, hfrontp, hblanke, hblanks;
 	u32 vactive, vsynce, vbackp, vfrontp, vblanke, vblanks;
-	u32 vblan2e = 0, vblan2s = 1;
+	u32 vblan2e = 0, vblan2s =...
2014 Sep 12
0
[PATCH 2/6] nv50/display: Set VBLANK time in modeset script
...11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index 03949ea..c15060e 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -1066,7 +1066,7 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode,
 	u32 vscan = (mode->flags & DRM_MODE_FLAG_DBLSCAN) ? 2 : 1;
 	u32 hactive, hsynce, hbackp, hfrontp, hblanke, hblanks;
 	u32 vactive, vsynce, vbackp, vfrontp, vblanke, vblanks;
-	u32 vblan2e = 0, vblan2s = 1;
+	u32 vblan2e = 0, vblan2s =...
2014 Oct 31
0
[PATCH] nv50/disp: Fix modeset on G94
...>> +       struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev);
> 
> >> +       u32 *push;
> >> +
> >> +       push = evo_wait(mast, 8);
> >
> > Just needs to be 2, no?
> Yes, doesn't matter too much though.
If it is, we might need to fix nv50_crtc_mode_set() too; it seems to assume the second parameter in evo_wait() is bytes, not words.
> 
> >
> >> +       if (!push)
> >> +               return -ENOMEM;
> >> +
> >> +       evo_mthd(push, 0x0828 + (nv_crtc->index * 0x400), 1);
> 
> >> +...
2011 Oct 09
11
[PATCH 01/10]: nouveau: assorted fixes
Hi,
Here is my patch queue I accumulated over quite a long time.
Patches 1-6 are bugfixes, and rest is mostly RFC.
Comments are welcome.
Best regards,
	Maxim Levitsky
2014 Oct 28
0
[PATCH] nv50/disp: Fix modeset on G94
...+++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index ae873d1..5beb352 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -1104,14 +1104,14 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode,
 			evo_mthd(push, 0x0804 + (nv_crtc->index * 0x400), 2);
 			evo_data(push, 0x00800000 | mode->clock);
 			evo_data(push, (ilace == 2) ? 2 : 0);
-			evo_mthd(push, 0x0810 + (nv_crtc->index * 0x400), 8);
+			evo_mthd(push, 0x0810 + (nv...
2014 Oct 30
0
[PATCH] nv50/disp: Fix modeset on G94
...ata(push, usec);
> +       evo_kick(push, mast);
> +
> +       return 0;
> +}
> +
> +static int
>  nv50_crtc_set_color_vibrance(struct nouveau_crtc *nv_crtc, bool update)
>  {
>         struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev);
> @@ -1104,14 +1121,14 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode,
>                         evo_mthd(push, 0x0804 + (nv_crtc->index * 0x400), 2);
>                         evo_data(push, 0x00800000 | mode->clock);
>                         evo_data(push, (ilace == 2) ? 2 : 0);
> -...
2014 Sep 04
10
MEMX improvements + DDR 2/3 MR generation
Patch 1 and 2 implement wait-for-vblank, required to remove flicker when reclocking memory
Patch 3 and 4 allow me to do things between waiting for VBLANK and disabling FB, like pause PFIFO and wait for the engines to idle. This minimises the time PFIFO is paused, thus maximises performance.
The rest of the patches speak for themselves. As the actual memory reclocking script is still somewhat prone
2014 Sep 12
6
NVA3: Small misc mem reclocking fixes
Patch 1 fixes nva3 bailing due to not finding the right ramcfg
Patch 2 is a resend rebased on 3.17.0-rc4 for setting the vblank period
Patch 3-5 handle writes to per-partition registers, for which NVA3 does not
have special broadcast regs available.
Patch 6 removes local structs from NVA3 reclocking in favour of the already
existing "ram->base." variables, like in NVE0
As always,
2009 Jul 02
1
[PATCH] drm/nv50: wait for fifo completion when needed
...static bool nv50_crtc_mode_fixup(struct drm_crtc *drm_crtc,
@@ -612,6 +615,7 @@ nv50_crtc_do_mode_set_base(struct drm_crtc *drm_crtc, int x, int y,
 		BEGIN_RING(evo, 0, NV50_UPDATE_DISPLAY, 1);
 		OUT_RING  (evo, 0);
 		FIRE_RING (evo);
+		RING_WAIT (evo);
 	}
 
 	return 0;
@@ -726,6 +730,7 @@ nv50_crtc_mode_set(struct drm_crtc *drm_crtc, struct drm_display_mode *mode,
 	crtc->set_scale(crtc, connector->scaling_mode, false);
 
 	FIRE_RING (evo);
+	RING_WAIT (evo);
 	return nv50_crtc_do_mode_set_base(drm_crtc, x, y, old_fb, false);
 }
 
diff --git a/drivers/gpu/drm/nouveau/nv50_cursor.c b/drivers/gpu/...
2013 Aug 12
0
[RFC PATCH] drm/nv50-nvd0: implement precise vblank timing support on nv50/nvc0.
...);
+	drm_vblank_post_modeset(crtc->dev, nv_crtc->index);
 }
 
 static bool
 nv50_crtc_mode_fixup(struct drm_crtc *crtc, const struct drm_display_mode *mode,
 		     struct drm_display_mode *adjusted_mode)
 {
+	drm_mode_set_crtcinfo(adjusted_mode, 0);
 	return true;
 }
 
@@ -1091,9 +1094,12 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode,
 		vactive = (vactive * 2) + 1;
 	}
 
+	drm_vblank_pre_modeset(crtc->dev, nv_crtc->index);
 	ret = nv50_crtc_swap_fbs(crtc, old_fb);
-	if (ret)
+	if (ret) {
+		drm_vblank_post_modeset(crtc->dev, nv_crtc->index);
 		return ret;
+	}...
2009 Dec 13
3
[PATCH] drm/nouveau: use drm debug levels
...m_crtc *crtc, int x, int y,
 	struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
 	int ret, format;
 
-	NV_DEBUG(dev, "index %d\n", nv_crtc->index);
+	NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
 
 	switch (drm_fb->depth) {
 	case  8:
@@ -612,7 +612,7 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
 
 	*nv_crtc->mode = *adjusted_mode;
 
-	NV_DEBUG(dev, "index %d\n", nv_crtc->index);
+	NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
 
 	hsync_dur = adjusted_mode->hsync_end - adjusted_mode->hsync_start;...
2009 Mar 24
0
nouveau running 2D on a 9800GTX from git master
...AU(0): nv50_crtc_prepare is called for CRTC0.
(II) NOUVEAU(0): NV50DacModeSet is called.
(II) NOUVEAU(0): Disconnecting DAC.
(II) NOUVEAU(0): NV50DacModeSet is called.
(II) NOUVEAU(0): Disconnecting DAC.
(II) NOUVEAU(0): NV50SorModeSet is called.
(II) NOUVEAU(0): Disconnecting SOR.
(II) NOUVEAU(0): nv50_crtc_mode_set is called for CRTC0.
(II) NOUVEAU(0): NV50CrtcModeSet is called for CRTC0.
(II) NOUVEAU(0): NV50CrtcSetDither is called (no update).
(II) NOUVEAU(0): NV50CrtcBlank is called (unblanked) for CRTC0.
(II) NOUVEAU(0): nv50_output_mode_set is called.
(II) NOUVEAU(0): NV50SorModeSet is called.
(II) NOUVE...
2009 Mar 27
3
[Bug 20915] New: Refresh rate out of range, server backtrace
...AU(0): nv50_crtc_prepare is called for CRTC0.
(II) NOUVEAU(0): NV50SorModeSet is called.
(II) NOUVEAU(0): Disconnecting SOR.
(II) NOUVEAU(0): NV50DacModeSet is called.
(II) NOUVEAU(0): Disconnecting DAC.
(II) NOUVEAU(0): NV50SorModeSet is called.
(II) NOUVEAU(0): Disconnecting SOR.
(II) NOUVEAU(0): nv50_crtc_mode_set is called for CRTC0.
(II) NOUVEAU(0): NV50CrtcModeSet is called for CRTC0.
(II) NOUVEAU(0): NV50CrtcSetDither is called (no update).
(II) NOUVEAU(0): NV50CrtcBlank is called (unblanked) for CRTC0.
(II) NOUVEAU(0): nv50_output_mode_set is called.
(II) NOUVEAU(0): NV50DacModeSet is called.
(II) NOUVE...