Displaying 20 results from an estimated 55 matches for "nv50_3d".
2014 Feb 13
2
[PATCH] nv50: make sure to clear _all_ layers of all attachments
...tate_validate.c
index f953422..100d02d 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
@@ -65,6 +65,7 @@ nv50_validate_fb(struct nv50_context *nv50)
PUSH_DATA (push, sf->height);
BEGIN_NV04(push, NV50_3D(RT_ARRAY_MODE), 1);
PUSH_DATA (push, array_mode | array_size);
+ nv50->rt_array_mode = array_mode | array_size;
} else {
PUSH_DATA (push, 0);
PUSH_DATA (push, 0);
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_surface.c b/src/gallium/drivers/nouve...
2014 May 21
2
[Mesa-dev] [PATCH 02/12] nv50: setup scissors on clear_render_target/depth_stencil
...t; --- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c
> +++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
> @@ -288,6 +288,14 @@ nv50_clear_render_target(struct pipe_context *pipe,
>
> PUSH_REFN(push, bo, mt->base.domain | NOUVEAU_BO_WR);
>
> + BEGIN_NV04(push, NV50_3D(SCREEN_SCISSOR_HORIZ), 2);
> + PUSH_DATA (push, ( width << 16) | dstx);
> + PUSH_DATA (push, (height << 16) | dsty);
> + BEGIN_NV04(push, NV50_3D(SCISSOR_HORIZ(0)), 2);
> + PUSH_DATA (push, 8192 << 16);
> + PUSH_DATA (push, 8192 << 16);
> + nv50...
2014 Feb 04
2
[PATCH 1/3] nv50: rework primid logic
...nv50_ir_prog_info *info)
if (info->in[i].sn == TGSI_SEMANTIC_COLOR)
prog->vp.bfc[info->in[i].si] = j;
- else if (info->in[i].sn == TGSI_SEMANTIC_PRIMID) {
+ else if (info->in[i].sn == TGSI_SEMANTIC_PRIMID)
prog->vp.attrs[2] |= NV50_3D_VP_GP_BUILTIN_ATTR_EN_PRIMITIVE_ID;
- prog->gp.primid = j;
- }
prog->in[j].id = i;
prog->in[j].mask = info->in[i].mask;
@@ -345,7 +343,6 @@ nv50_program_translate(struct nv50_program *prog, uint16_t chipset)
prog->vp.clpd[0] = map_undef;...
2014 May 20
0
[PATCH 02/12] nv50: setup scissors on clear_render_target/depth_stencil
....c
index 1f37527..6e68fb8 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
@@ -288,6 +288,14 @@ nv50_clear_render_target(struct pipe_context *pipe,
PUSH_REFN(push, bo, mt->base.domain | NOUVEAU_BO_WR);
+ BEGIN_NV04(push, NV50_3D(SCREEN_SCISSOR_HORIZ), 2);
+ PUSH_DATA (push, ( width << 16) | dstx);
+ PUSH_DATA (push, (height << 16) | dsty);
+ BEGIN_NV04(push, NV50_3D(SCISSOR_HORIZ(0)), 2);
+ PUSH_DATA (push, 8192 << 16);
+ PUSH_DATA (push, 8192 << 16);
+ nv50->scissors_dirty |= 1;
+...
2014 May 21
0
[Mesa-dev] [PATCH 02/12] nv50: setup scissors on clear_render_target/depth_stencil
.../drivers/nouveau/nv50/nv50_surface.c
>> +++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
>> @@ -288,6 +288,14 @@ nv50_clear_render_target(struct pipe_context *pipe,
>>
>> PUSH_REFN(push, bo, mt->base.domain | NOUVEAU_BO_WR);
>>
>> + BEGIN_NV04(push, NV50_3D(SCREEN_SCISSOR_HORIZ), 2);
>> + PUSH_DATA (push, ( width << 16) | dstx);
>> + PUSH_DATA (push, (height << 16) | dsty);
>> + BEGIN_NV04(push, NV50_3D(SCISSOR_HORIZ(0)), 2);
>> + PUSH_DATA (push, 8192 << 16);
>> + PUSH_DATA (push, 8192 <<...
2015 Jan 02
2
[PATCH] nv50: enable texture compression
...50_screen_init_hwctx(struct nouveau_device *dev, struct nv50_screen *screen)
{
struct nouveau_pushbuf *push = screen->base.pushbuf;
struct nv04_fifo *fifo;
@@ -449,6 +449,13 @@ nv50_screen_init_hwctx(struct nv50_screen *screen)
PUSH_DATA (push, 0x18);
}
+ BEGIN_NV04(push, NV50_3D(ZETA_COMP_ENABLE), 1);
+ PUSH_DATA(push, dev->drm_version >= 0x01000101);
+
+ BEGIN_NV04(push, NV50_3D(RT_COMP_ENABLE(0)), 8);
+ for (i = 0; i < 8; ++i)
+ PUSH_DATA(push, dev->drm_version >= 0x01000101);
+
BEGIN_NV04(push, NV50_3D(RT_CONTROL), 1);
PUSH_DATA (push,...
2014 Jan 17
2
[PATCH] nv50, nvc0: only clear out the buffers that we were asked to clear
...au/nv50/nv50_surface.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
@@ -408,9 +408,6 @@ nv50_clear(struct pipe_context *pipe, unsigned buffers,
PUSH_DATAf(push, color->f[1]);
PUSH_DATAf(push, color->f[2]);
PUSH_DATAf(push, color->f[3]);
- mode =
- NV50_3D_CLEAR_BUFFERS_R | NV50_3D_CLEAR_BUFFERS_G |
- NV50_3D_CLEAR_BUFFERS_B | NV50_3D_CLEAR_BUFFERS_A;
}
if (buffers & PIPE_CLEAR_DEPTH) {
@@ -425,12 +422,16 @@ nv50_clear(struct pipe_context *pipe, unsigned buffers,
mode |= NV50_3D_CLEAR_BUFFERS_S;
}
- BEGIN_NV04(pus...
2015 Mar 21
0
[PATCH] use defined method names where available
...1);
BEGIN_NV04(push, NV50_2D(COLOR_KEY_ENABLE), 1);
PUSH_DATA (push, 0);
- BEGIN_NV04(push, SUBC_2D(0x058c), 1);
+ BEGIN_NV04(push, NV50_2D(UNK58C), 1);
PUSH_DATA (push, 0x111);
pNv->currentRop = 0xfffffffa;
@@ -205,7 +205,7 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn)
BEGIN_NV04(push, NV50_3D(VIEWPORT_TRANSFORM_EN), 1);
PUSH_DATA (push, 0);
- BEGIN_NV04(push, SUBC_3D(0x0f90), 1);
+ BEGIN_NV04(push, NV50_3D(COLOR_MASK_COMMON), 1);
PUSH_DATA (push, 1);
BEGIN_NV04(push, NV50_3D(TIC_ADDRESS_HIGH), 3);
diff --git a/src/nv50_accel.h b/src/nv50_accel.h
index 87c88a3..9b06e38 100644
---...
2014 Mar 01
0
[PATCH] nv50,nvc0: add 11f_11f_10f vertex support
...at alum.mit.edu>
---
Tested on nv96 with Chris Forbes's piglit tests (on list, but not checked in
yet)... only assuming about nvc0, but it seems reasonable since all the other
attributes are the same.
docs/GL3.txt | 2 +-
src/gallium/drivers/nouveau/nv50/nv50_3d.xml.h | 1 +
src/gallium/drivers/nouveau/nv50/nv50_formats.c | 2 +-
src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h | 1 +
4 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/docs/GL3.txt b/docs/GL3.txt
index 755a89c..9738ffc 100644
--- a/docs/GL3.txt
+++ b/docs/GL3.txt
@@ -177,7 +177,...
2015 Oct 10
3
[PATCH] nv50, nvc0: don't base decisions on available pushbuf space
...;
- nr = PUSH_AVAIL(push);
- assert(nr >= 16);
- nr = MIN2(MIN2(nr - 3, words), NV04_PFIFO_MAX_PACKET_LEN);
+ unsigned nr = MIN2(words, NV04_PFIFO_MAX_PACKET_LEN);
+ PUSH_SPACE(push, nr + 3);
BEGIN_NV04(push, NV50_3D(CB_ADDR), 1);
PUSH_DATA (push, (start << 8) | b);
BEGIN_NI04(push, NV50_3D(CB_DATA(0)), nr);
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_transfer.c b/src/gallium/drivers/nouveau/nv50/nv50_transfer.c
index be51407..9a3fd1e 100644
--- a/src/gallium/drivers...
2014 May 20
14
[PATCH 00/12] Cherry-pick nv50/nvc0 patches from gallium-nine
I went through the gallium-nine tree and picked out nouveau patches that are
general bug-fixes. The first bunch I'd like to also get into 10.2. I've
reviewed all of them and they make sense to me, but sending them out for
public review as well in case there are any objections.
Unless I hear objections, I'd like to push this by Friday.
Christoph Bumiller (11):
nv50,nvc0: always pull
2014 Mar 06
0
[RFC PATCH] nv50: adjust blit_3d logic
...16e667 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
@@ -1069,7 +1069,7 @@ nv50_blit_3d(struct nv50_context *nv50, const struct pipe_blit_info *info)
PUSH_DATAf(push, y0);
PUSH_DATAf(push, z);
BEGIN_NV04(push, NV50_3D(VTX_ATTR_2F_X(0)), 2);
- PUSH_DATAf(push, 16384 << nv50_miptree(dst)->ms_x);
+ PUSH_DATAf(push, 16384/* << nv50_miptree(dst)->ms_x*/);
PUSH_DATAf(push, 0.0f);
BEGIN_NV04(push, NV50_3D(VTX_ATTR_3F_X(1)), 3);
PUSH_DATAf(push, x0);
@@ -1077,7 +1077,7 @@...
2014 Jul 10
3
[PATCH 0/3] nvc0: ARB_(multi_)draw_indirect support
...has already been signalled
docs/GL3.txt | 5 +-
docs/relnotes/10.3.html | 1 +
src/gallium/drivers/nouveau/nouveau_fence.c | 3 +
src/gallium/drivers/nouveau/nouveau_screen.c | 6 +-
src/gallium/drivers/nouveau/nv50/nv50_3d.xml.h | 2 +-
src/gallium/drivers/nouveau/nv50/nv50_screen.c | 2 +
src/gallium/drivers/nouveau/nvc0/mme/com9097.mme | 75 ++++++++++++++++++
src/gallium/drivers/nouveau/nvc0/mme/com9097.mme.h | 56 ++++++++++++++
src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h | 6 ++
src/gallium/d...
2014 Jan 13
20
[PATCH 00/19] nv50: add sampler2DMS/GP support to get OpenGL 3.2
OK, so there's a bunch of stuff in here. The geometry stuff is based on the
work started by Bryan Cain and Christoph Bumiller.
Patches 01-12: Add support for geometry shaders and fix related issues
Patches 13-14: Make it possible for fb clears to operate on texture attachments
with an explicit layer set (as is allowed in gl 3.2).
Patches 15-17: Make ARB_texture_multisample work
2014 Jan 23
2
[Mesa-dev] [PATCH] nv50, nvc0: only clear out the buffers that we were asked to clear
...au/nv50/nv50_surface.c
>> @@ -408,9 +408,6 @@ nv50_clear(struct pipe_context *pipe, unsigned buffers,
>> PUSH_DATAf(push, color->f[1]);
>> PUSH_DATAf(push, color->f[2]);
>> PUSH_DATAf(push, color->f[3]);
>> - mode =
>> - NV50_3D_CLEAR_BUFFERS_R | NV50_3D_CLEAR_BUFFERS_G |
>> - NV50_3D_CLEAR_BUFFERS_B | NV50_3D_CLEAR_BUFFERS_A;
>> }
>>
> I'm not sure why you've dropped the mode from above. I'm guessing that
> the initial assumption was that if there is a color buffer it must b...
2014 Mar 06
0
[PATCH] nv50, nvc0: adjust blit_3d handling of ms output textures
...ge;
x0 *= (float)(1 << nv50_miptree(src)->ms_x);
x1 *= (float)(1 << nv50_miptree(src)->ms_x);
@@ -1069,7 +1073,7 @@ nv50_blit_3d(struct nv50_context *nv50, const struct pipe_blit_info *info)
PUSH_DATAf(push, y0);
PUSH_DATAf(push, z);
BEGIN_NV04(push, NV50_3D(VTX_ATTR_2F_X(0)), 2);
- PUSH_DATAf(push, 16384 << nv50_miptree(dst)->ms_x);
+ PUSH_DATAf(push, x_output);
PUSH_DATAf(push, 0.0f);
BEGIN_NV04(push, NV50_3D(VTX_ATTR_3F_X(1)), 3);
PUSH_DATAf(push, x0);
@@ -1077,7 +1081,7 @@ nv50_blit_3d(struct nv50_context *nv...
2014 Jan 15
3
[PATCH] nv50, nvc0: don't crash on a null cbuf
This is needed since commit 9baa45f78b (st/mesa: bind NULL colorbuffers
as specified by glDrawBuffers).
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
Not sure whether something needs to be done to clear out the old RT_* settings
for that index buffer, or if things are cleared out implicitly. Perhaps
instead of skipping indices, RT_CONTROL needs to be adjusted with the
2014 Dec 31
0
[PATCH] nv50,nvc0: set vertex id base to index_bias
...au/nv50/nv50_screen.c b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
index ff08734..2d8347b 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
@@ -608,6 +608,13 @@ nv50_screen_init_hwctx(struct nv50_screen *screen)
BEGIN_NV04(push, NV50_3D(EDGEFLAG), 1);
PUSH_DATA (push, 1);
+ BEGIN_NV04(push, NV50_3D(VB_ELEMENT_BASE), 1);
+ PUSH_DATA (push, 0);
+ if (screen->base.class_3d >= NV84_3D_CLASS) {
+ BEGIN_NV04(push, SUBC_3D(NV84_3D_VERTEX_ID_BASE), 1);
+ PUSH_DATA (push, 0);
+ }
+
PUSH_KICK (push);
}
d...
2015 Oct 10
2
[PATCH] nv50, nvc0: don't base decisions on available pushbuf space
...o ensure that both of the below commands are in the same
batch. Not sure if it's necessary, but... don't want to find out. They
were in the same batch before. And this batch stuff is what was
causing the M2MF errors I was seeing earlier.
>
>
>> BEGIN_NV04(push, NV50_3D(CB_ADDR), 1);
>> PUSH_DATA (push, (start << 8) | b);
>> BEGIN_NI04(push, NV50_3D(CB_DATA(0)), nr);
>> diff --git a/src/gallium/drivers/nouveau/nv50/nv50_transfer.c
>> b/src/gallium/drivers/nouveau/nv50/nv50_transfer.c
>> index be...
2015 Jan 02
0
[PATCH] nv50: enable texture compression
...vice *dev, struct nv50_screen *screen)
> {
> struct nouveau_pushbuf *push = screen->base.pushbuf;
> struct nv04_fifo *fifo;
> @@ -449,6 +449,13 @@ nv50_screen_init_hwctx(struct nv50_screen *screen)
> PUSH_DATA (push, 0x18);
> }
>
> + BEGIN_NV04(push, NV50_3D(ZETA_COMP_ENABLE), 1);
> + PUSH_DATA(push, dev->drm_version >= 0x01000101);
screen->base.device
And then no need to pass dev in, I think.
> +
> + BEGIN_NV04(push, NV50_3D(RT_COMP_ENABLE(0)), 8);
> + for (i = 0; i < 8; ++i)
> + PUSH_DATA(push, dev->drm_ver...