search for: nv4x

Hi Maarten, xf86-video-nouveau causes a garbled display when running gnome-shell on nv4x (tested with nv43 and nv46) since this commit: http://cgit.freedesktop.org/nouveau/xf86-video-nouveau/commit/?id=241e7289f25a342a457952b9b0e539c2f0b81d99 I've seen some discussion about issues caused by enabling dri, but AFAIK no solution let. I have time to help with debugging / fixing this...

https://bugs.freedesktop.org/show_bug.cgi?id=91986 Bug ID: 91986 Summary: Artifacts in models rendering with GeForce 6150 (NV4x chipsets) Product: Mesa Version: git Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: major Priority: medium Component: Drivers/DRI/nouveau Assignee: nouveau at lists...

...er: ronald645 at gmail.com Hardware: Other Status: NEW Version: git Component: Driver/nouveau Product: xorg I saw this on IRC: 10:59 #nouveau: < mupuf> ok 11:00 #nouveau: < blackiner> imirkin: i know you were messing around a bit on nv4x video decoding stuff a bit back, did you have any patches that would have affected a nv43 recently? 11:00 #nouveau: < blackiner> just tried out arch on my other machine, any vdpau video seems to freeze the machine on it 11:01 #nouveau: < blackiner> but xv works fine 11:01 #nouveau: <...

See https://bugs.freedesktop.org/show_bug.cgi?id=74492 Reported-by: Ronald <ronald645 at gmail.com> Suggested-by: Marcin Ko?cielnicki <koriakin at 0x04.net> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- drivers/gpu/drm/nouveau/Makefile | 1 + drivers/gpu/drm/nouveau/core/engine/device/nv40.c | 10 ++---

https://bugs.freedesktop.org/show_bug.cgi?id=102352 Bug ID: 102352 Summary: nv4x fan run whole time at 100%, stable patch existing since about 1 year, please merge Product: xorg Version: unspecified Hardware: All OS: Linux (All) Status: NEW Severity: trivial Priority: medium...

Hi, On 30-07-15 16:09, Ilia Mirkin wrote: > FWIW this is a fail on nv50+ as well. See for example > https://bugs.freedesktop.org/show_bug.cgi?id=91445 > > My suspicion is that this is due to the lack of PUSH_KICK in the *Done > exa handlers -- works fine with DRI2, but DRI3 has no synchronization > and so the commands never get flushed out. Easily verified by sticking >

Hi All, Here is a bunch of fixes for nv30 cards, the first patch is a resend of a patch I send a while back. AFAICT that one is ready for merging, but it is not entirely clear to me what the process is for getting (nouveau) mesa patches merged. Should I request commit rights, and push my own patches once they have been reviewed ? Regards, Hans

MSI interrupts appear to not work for nv46 based cards. Change the mc subdev oclass for these cards from nv44 to nv4c, the nv4c mc code is identical to the nv44 mc code except that it does not use msi (it does not define a msi_rearm callback). BugLink: https://bugs.freedesktop.org/show_bug.cgi?id=90435 Signed-off-by: Hans de Goede <hdegoede at redhat.com> ---

On Wed, Sep 2, 2015 at 5:48 AM, Hans de Goede <hdegoede at redhat.com> wrote: > Hi Ilia > > On 31-08-15 18:30, Ilia Mirkin wrote: >> >> On Mon, Aug 31, 2015 at 8:58 AM, Hans de Goede <hdegoede at redhat.com> >> wrote: > > > <snip> > > >>> Interestingly enough nv30_screen_get_param returns 0 for >>>

...s, we use a write through PCI config space to the "EOI" > register to rearm the MSI interrupt after servicing it, rather than a write > through the MMIO pcicfg shadow region in the GPU's PCI BAR0 window at offset > 0x88000. (This was actually originally implemented for NV4x, so you'll > probably want to do that there as well.) Hm, I recently discovered this while looking for the errata myself, but it seems you guys only do it on G80/G84/G86, and use 0x88068 at some point after that, before Fermi (G96/GT200, for example). > It seems that this was done to...

...gt;> maintained. To those maintainers, please consider including this in >> your trees. > > But it needs > commit fa8c9ac72fe0bcdf5bc7cc84e85cc2a1af53f9fd > Author: Ilia Mirkin <imirkin at alum.mit.edu> > Date: Wed Feb 5 14:33:02 2014 -0500 > > drm/nv4c/mc: nv4x igp's have a different msi rearm register > > See https://bugs.freedesktop.org/show_bug.cgi?id=74492 > > which is only in 3.14. So I cannot take it into 3.12. Doh! I could have sworn that this commit was also backported, but I guess not. I did a big more digging, a few results:...

..." [ 64601.460] EndSection [ 64601.460] Section "Screen" [ 64601.460] Identifier "Builtin Default nouveau Screen 0" [ 64601.460] Device "Builtin Default nouveau Device 0" [ 64601.460] EndSection [ 64601.469] GeForce 6 (NV4x) [ 64601.474] (--) NOUVEAU(0): Chipset: "NVIDIA NV4b" I have no xorg.conf file. I have a GeForce 7 (G7x) chip set on my video card. The NOUVEAU driver is misidentifying my chip set. I suspect that this is a major part of the reason why video acceleration is not working. How can I g...

...fers that disappears putting the buffers in VRAM that I'm experiencing on my card. The system I'm seeing this on is a Dell Inspiron 9400 notebook with a GeForce Go 7900 GS on a PCI Express Intel i945 chipset. First, I've looked into the behavior of the nVidia driver: 1. On all NV3x and NV4x traces, and my system, vertex buffers are always put in VRAM (renouveau uses GL_STATIC_DRAW) 2. On my system all vertex object usage flags still cause the vertex buffer to be put in VRAM 3. On my system GL_NV_vertex_range causes the use of a GART vertex buffer, and seems the only way to do so Note...

Hi, As the last tindc said something about 3d really working on nv4x, I wanted to try that ( on a NV43). Built nouveau/mesa -> gallium-0.1 branch of mesa and git head of libdrm, kernel-drm and xf86-video-nouveau. glxinfo says: nouveau DRI driver expected DDX version 1-1.2.x but got version 0.0.10 So I assume I need some other branch of xf86-video-nouveau (?)...

...Please refer to __xconfigfile__(__filemansuffix__) for general configuration diff --git a/src/nv_driver.c b/src/nv_driver.c index 1d276cf..2f8c89c 100644 --- a/src/nv_driver.c +++ b/src/nv_driver.c @@ -140,8 +140,12 @@ static struct NvFamily NVKnownFamilies[] = { "GeForce 6", "NV4x" }, { "GeForce 7", "G7x" }, { "GeForce 8", "G8x" }, - { "GeForce GTX 200", "NVA0" }, - { "GeForce GTX 400", "NVC0" }, + { "GeForce 9", "G9x" }, + { "GeForce GTX 2xx/3xx&quot...

...d 4.2 (inclusive) which are still being > maintained. To those maintainers, please consider including this in > your trees. But it needs commit fa8c9ac72fe0bcdf5bc7cc84e85cc2a1af53f9fd Author: Ilia Mirkin <imirkin at alum.mit.edu> Date: Wed Feb 5 14:33:02 2014 -0500 drm/nv4c/mc: nv4x igp's have a different msi rearm register See https://bugs.freedesktop.org/show_bug.cgi?id=74492 which is only in 3.14. So I cannot take it into 3.12. thanks, -- js suse labs

Hello, I'd like to recommend backporting this commit: commit 0a363e85cdafbceeee6a49b91c604d0d4d070dc7 Author: Hans de Goede <hdegoede at redhat.com> Date: Thu Jul 23 17:20:12 2015 +0200 drm/nouveau/nv46: Change mc subdev oclass from nv44 to nv4c This disables MSI by default on G72 (NV46) devices where it's apparently a bit buggy. We have a later patch which turns MSI back

Hi, On 03-08-15 17:36, Ilia Mirkin wrote: > On Mon, Aug 3, 2015 at 9:02 AM, Hans de Goede <hdegoede at redhat.com> wrote: >> Hi, >> >> On 30-07-15 16:09, Ilia Mirkin wrote: >>> >>> FWIW this is a fail on nv50+ as well. See for example >>> https://bugs.freedesktop.org/show_bug.cgi?id=91445 >>> >>> My suspicion is that this is

...] nouveau E[soffice.bin[3785]] validating bo list > [ 1201.766968] nouveau E[soffice.bin[3785]] validate: -12 > > After which the program using the msaa visual freezes, and eventually > the entire system freezes. Disable msaa until this is fixed. > > This happens on both nv3x and nv4x cards. Ugh. This is aka "you ran out of vram, goodbye". We don't really handle that case extremely well. I feel really bad doing this :( The issue is anachronistic applications like soffice that don't keep with the limitations of GPUs of the days of yore. So we end up penalizing...

...v30_screen.c +++ b/src/gallium/drivers/nouveau/nv30/nv30_screen.c @@ -84,6 +84,8 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) return 0; case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: return 16; + case PIPE_CAP_MAX_VIEWPORTS: + return 1; /* nv4x capabilities */ case PIPE_CAP_BLEND_EQUATION_SEPARATE: case PIPE_CAP_NPOT_TEXTURES: diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c index f84c41b..28d9be2 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c +++ b/src/galli...