search for: nv41

It's a miracle it compiles at all - nv04_vm_priv does not exist anywhere in the tree. Signed-off-by: Marcin Slusarz <marcin.slusarz at gmail.com> --- Noticed when adding types to Nouveau APIs. --- drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c index 4545b0c..e41ce9b 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c @...

It's a miracle it compiles at all - nv04_vm_priv does not exist anywhere in the tree. Signed-off-by: Marcin Slusarz <marcin.slusarz at gmail.com> --- v2: rebased on top of nouveau/master --- drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c index 49050d9..9474cfc 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c @...

...30/40 merge also introduced artifacts and instabilities on BE which I haven't tracked down either). The basic idea here is that the backend vmm->map_sg operates on system PAGE_SIZE, which allows to continue passing a page array down as we do today. That means however that only the nv04 and nv41 backends handle that case right now, the other ones will have to be fixed eventually but the fix is rather easy. Now it's possible that I've missed cases where card objects might be allocated in vram that isn't system PAGE_SIZE aligned, in which case we will have breakage due to having...

Hi folks ! So I've been trying to figure out what it would take to make nouveau work properly on architectures where PAGE_SIZE isn't 4k such as most ppc64's. An initial patch from Dave fixed a bogon in nv41.c nv41_vm_map_sg() which was trying to handle the case at that low level, but this isn't enough, and after a bit of digging, I also think that's not the right approach: So, from what I can tell, subdev/vm/base.c is not clean vs. PAGE_SIZE in a number of places unless I'm mistaken. For...

...hys | 3); > > - phys += NV04_PDMA_PAGE; > > - pte += 4; > > - cnt -= 1; > > - } > > + nv_wo32(pgt, pte, phys | 3); > > + pte += 4; > > + cnt -= 1; > > } > > } > > > > diff --git a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c > > index 064c762..a78f624 100644 > > --- a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c > > +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c > > @@ -43,14 +43,10 @@ nv41_vm_map_sg(struct nouveau_vma *vma, struct nouveau_...

..._SIZE / NV04_PDMA_PAGE; u32 phys = (u32)*list++; - while (cnt && page--) { - nv_wo32(pgt, pte, phys | 3); - phys += NV04_PDMA_PAGE; - pte += 4; - cnt -= 1; - } + nv_wo32(pgt, pte, phys | 3); + pte += 4; + cnt -= 1; } } diff --git a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c index 064c762..a78f624 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c @@ -43,14 +43,10 @@ nv41_vm_map_sg(struct nouveau_vma *vma, struct nouveau_gpuobj *pgt, { pte = pte * 4; while...

...acts and instabilities on BE which I > haven't tracked down either). > > The basic idea here is that the backend vmm->map_sg operates on system > PAGE_SIZE, which allows to continue passing a page array down as we do > today. > > That means however that only the nv04 and nv41 backends handle that case > right now, the other ones will have to be fixed eventually but the fix > is rather easy. > > Now it's possible that I've missed cases where card objects might be > allocated in vram that isn't system PAGE_SIZE aligned, in which case we > wil...

...dhat.com> >> Cc: Ilia Mirkin <imirkin at alum.mit.edu> >> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com> > > s/standarad/standard/ in subject > > I'd like the opportunity to test this out on real hardware, but I > don't have any pre-NV41 boards plugged in right now. I should be able > to attend to it within 7 days. If you don't hear back from me by then, > I'd appreciate a ping, as I do let things (hopefully occasionally) > slip through. Tested this out on a NV34. Seems to work - at least the green SMPTE bar looks...

...(cnt && page--) { > - nv_wo32(pgt, pte, phys | 3); > - phys += NV04_PDMA_PAGE; > - pte += 4; > - cnt -= 1; > - } > + nv_wo32(pgt, pte, phys | 3); > + pte += 4; > + cnt -= 1; > } > } > > diff --git a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c > index 064c762..a78f624 100644 > --- a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c > +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c > @@ -43,14 +43,10 @@ nv41_vm_map_sg(struct nouveau_vma *vma, struct nouveau_gpuobj *pgt, > {...

...GeForce2, QUADRO2 -NV11 & NV15 +NV11 & NV15 .TP 22 .B GeForce3, QUADRO DCC NV20 @@ -44,13 +44,26 @@ NV1A, NV1F NV17, NV18, NV25, NV28 .TP 22 .B GeForce FX, QUADRO FX -NV30, NV31, NV34, NV35, NV36, NV37, NV38 +NV30, NV31, NV34, NV35, NV36, NV37, NV38 .TP 22 .B GeForce 6XXX -NV40, NV41, NV43, NV44, NV45, C51 +NV40, NV41, NV43, NV44, NV45, C51, MCP61 .TP 22 .B GeForce 7XXX -G70, G71, G72, G73 +G70, G71, G72, G73, MCP67, MCP68, MCP73 +.TP 22 +.B GeForce 8XXX, 9XXX, 2XX, 3XX +G80, G84, G86, G92, G94, G96, G98, G200, GT215, GT216, GT218, MCP77, +MCP79, MCP89 +.TP 22 +.B GeForce 4XX...

.../MASK in some cases. > IE. The only one we should actually care about here is > nouveau_vm_map_sg_table() or am I missing an important piece of the > puzzle ? nouveau_vm_map_sg too. nouveau_vm_map is special, and also used to map VRAM into BAR1/BAR3 by subdev/bar code. > Additionally, nv41.c has only map_sg() callbacks, no map() callbacks, > should I assume that means that nouveau_vm_map() and nouveau_vm_map_at() > will never be called on these ? Correct. all cards before the nv50 family have no real vm. the BAR used for vram is just an identity mapping, not the entirety of VRA...

...cnt -= 1; >> > - } >> > + nv_wo32(pgt, pte, phys | 3); >> > + pte += 4; >> > + cnt -= 1; >> > } >> > } >> > >> > diff --git a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c >> > index 064c762..a78f624 100644 >> > --- a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c >> > +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c >> > @@ -43,14 +43,10 @@ nv41_vm_map_sg(struct nouveau_vma *vma,...

...Mirkin <imirkin at alum.mit.edu> > >> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com> > > > > s/standarad/standard/ in subject > > > > I'd like the opportunity to test this out on real hardware, but I > > don't have any pre-NV41 boards plugged in right now. I should be able > > to attend to it within 7 days. If you don't hear back from me by then, > > I'd appreciate a ping, as I do let things (hopefully occasionally) > > slip through. > > Tested this out on a NV34. Seems to work - at least...

...c: Ben Skeggs <bskeggs at redhat.com> > Cc: Ilia Mirkin <imirkin at alum.mit.edu> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com> s/standarad/standard/ in subject I'd like the opportunity to test this out on real hardware, but I don't have any pre-NV41 boards plugged in right now. I should be able to attend to it within 7 days. If you don't hear back from me by then, I'd appreciate a ping, as I do let things (hopefully occasionally) slip through. > --- > drivers/gpu/drm/nouveau/dispnv04/overlay.c | 26 +++++++++++++------------- &g...

...solely concerned with mapping a piece of card address space in the card VM and thus shouldn't be concerned by the system PAGE_SIZE at all, right ? IE. The only one we should actually care about here is nouveau_vm_map_sg_table() or am I missing an important piece of the puzzle ? Additionally, nv41.c has only map_sg() callbacks, no map() callbacks, should I assume that means that nouveau_vm_map() and nouveau_vm_map_at() will never be called on these ? - In vm/base.c this construct appears regulary: struct nouveau_gpuobj *pgt = vm->pgt[pde].obj[big]; Which makes me believe we have s...

...er commands. +1 all :ref:`PGRAPH <graph-intro>` Main engine of the card: 2d, 3d, compute. +2 NV31:NV98 :ref:`PMPEG <pmpeg>` The PFIFO interface to VPE MPEG2 decoding engine. NVA0:NVAA 3 NV40:NV84 :ref:`PME <me-fifo>` VPE motion estimation engine. 4 NV41:NV84 :ref:`PVP1 <pvp1>` VPE microcoded vector processor. @@ -64,10 +64,10 @@ The engines that PFIFO controls on NVC0- are: ===== ========== =========================== =================================================== Id Present on Name Description...

...v_wr08(device, 0x00088068, 0xff); + nv_wr08(device, 0x1868, 0xff); nv_info(pmc, "MSI interrupts enabled\n"); } } I guess this needs a way of telling whether it has "for real" MSI or not. That 1800 range is on NV41:NV50 according to rnndb, which probably means that it's safe to use msi on nv41+ (via the 88068 address, since the 1800 stuff disappears on nv50+). [Based purely on speculation, btw, not on hardware experimentation. I assume pci_enable_msi() would implicitly fail on any non-pcie card, e.g. nv4a...

...eForce2 era). I experienced the _exact_same_ issues in XP until I grabbed the latest WHQL driver for XP. Example 3: NV4x-era Xorg (FC3) with NV40 card Now on the _very_same_system_, I loaded Fedora Core 3 AMD64 which includes a newer Xorg release with not only NV40 (GeForce 6800), but even some NV41/43 (GeForce 6200/6600) and the latest NV45 (GeForce 6800, PCIe native). So I didn't have an issue even using the stock Xorg driver. So, are you sure you are using the nVidia driver _downloaded_ from nVidia? Or are you simply using the nVidia (nv) driver CentOS 3 is detecting when installed?...

http://bugs.freedesktop.org/show_bug.cgi?id=20298 Summary: Nouveau doesn't allow my modeline because of hardcoded value Product: xorg Version: git Platform: All OS/Version: All Status: NEW Severity: normal Priority: medium Component: Driver/nouveau AssignedTo: nouveau at

...e/subdev/fb/nv10.o -nouveau-y += core/subdev/fb/nv1a.o -nouveau-y += core/subdev/fb/nv20.o -nouveau-y += core/subdev/fb/nv25.o -nouveau-y += core/subdev/fb/nv30.o -nouveau-y += core/subdev/fb/nv35.o -nouveau-y += core/subdev/fb/nv36.o -nouveau-y += core/subdev/fb/nv40.o -nouveau-y += core/subdev/fb/nv41.o -nouveau-y += core/subdev/fb/nv44.o -nouveau-y += core/subdev/fb/nv46.o -nouveau-y += core/subdev/fb/nv47.o -nouveau-y += core/subdev/fb/nv49.o -nouveau-y += core/subdev/fb/nv4e.o -nouveau-y += core/subdev/fb/nv50.o -nouveau-y += core/subdev/fb/nv84.o -nouveau-y += core/subdev/fb/nva3.o -nouveau-...