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On Mon, Jun 12, 2017 at 5:46 PM, Samuel Pitoiset <samuel.pitoiset at gmail.com> wrote: > > > On 06/10/2017 09:14 AM, Aaryaman Vasishta wrote: >> >> See the 'wt' on the first fmul in exacanv110.fp, exacmnv110.fp and >> exasanv110.fp. Any ideas on what could be causing the first fmul to require >> $r0 and/or $r1? > > > 'tex nodep $r4 $r2 0x0 0x1 t2d 0xf' > > is actually: > > 'tex nodep $r4:$r7 $r2 0x0 0x1 t2d 0xf' Actually more like: tex n...

...rote: >> >> On Mon, Jun 12, 2017 at 5:46 PM, Samuel Pitoiset >> <samuel.pitoiset at gmail.com> wrote: >> > >> > >> > On 06/10/2017 09:14 AM, Aaryaman Vasishta wrote: >> >> >> >> See the 'wt' on the first fmul in exacanv110.fp, exacmnv110.fp and >> >> exasanv110.fp. Any ideas on what could be causing the first fmul to >> >> require >> >> $r0 and/or $r1? >> > >> > >> > 'tex nodep $r4 $r2 0x0 0x1 t2d 0xf' >> > >> > is actually: >...

https://bugs.freedesktop.org/show_bug.cgi?id=111392 Bug ID: 111392 Summary: [NV110] bus: MMIO read of 00000000 FAULT at 619444 [ IBUS ] Product: xorg Version: unspecified Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: normal Priority: medium Component: Driv...

...in <imirkin at alum.mit.edu> wrote: > On Mon, Jun 12, 2017 at 5:46 PM, Samuel Pitoiset > <samuel.pitoiset at gmail.com> wrote: > > > > > > On 06/10/2017 09:14 AM, Aaryaman Vasishta wrote: > >> > >> See the 'wt' on the first fmul in exacanv110.fp, exacmnv110.fp and > >> exasanv110.fp. Any ideas on what could be causing the first fmul to > require > >> $r0 and/or $r1? > > > > > > 'tex nodep $r4 $r2 0x0 0x1 t2d 0xf' > > > > is actually: > > > > 'tex nodep $r4:$r7 $r...

https://bugs.freedesktop.org/show_bug.cgi?id=99487 Bug ID: 99487 Summary: [NV110] HP Pavilion 15 with Maxwell 950M fails to read BIOS (fix included) Product: xorg Version: unspecified Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: major Priority: medium C...

...vf0.vpc,$(SHADERS)): %.vpc: %.vp >> cpp -DENVYAS $< | sed -e '/^#/d' | $(ENVYAS) -w -m gk110 -o $@ >> $(filter %nvf0.fpc,$(SHADERS)): %.fpc: %.fp >> cpp -DENVYAS $< | sed -e '/^#/d' | $(ENVYAS) -w -m gk110 -o $@ >> + >> +$(filter %nv110.vpc,$(SHADERS)): %.vpc: %.vp >> + cpp -DENVYAS $< | sed -e '/^#/d' | $(ENVYAS) -w -m gm107 -o $@ >> +$(filter %nv110.fpc,$(SHADERS)): %.fpc: %.fp >> + cpp -DENVYAS $< | sed -e '/^#/d' | $(ENVYAS) -w -m gm107 -o $@ >> diff --git a/src/shader/...

...well exa shaders. rendercheck tests seem consistent with/without this patch. I haven't extensively tested them though. Trello: https://trello.com/c/6LPB2EIS/174-update-maxwell-shaders-with-proper-delays Signed-off-by: Aaryaman Vasishta <jem456.vasishta at gmail.com> --- src/shader/exac8nv110.fp | 10 +++++----- src/shader/exac8nv110.fpc | 18 +++++++++--------- src/shader/exacanv110.fp | 10 +++++----- src/shader/exacanv110.fpc | 18 +++++++++--------- src/shader/exacmnv110.fp | 10 +++++----- src/shader/exacmnv110.fpc | 18 +++++++++--------- src/shader/exas8nv110.fp | 6 +++---...

...well exa shaders. rendercheck tests seem consistent with/without this patch. I haven't extensively tested them though. Trello: https://trello.com/c/6LPB2EIS/174-update-maxwell-shaders-with-proper-delays Signed-off-by: Aaryaman Vasishta <jem456.vasishta at gmail.com> --- src/shader/exac8nv110.fp | 10 +++++----- src/shader/exac8nv110.fpc | 18 +++++++++--------- src/shader/exacanv110.fp | 10 +++++----- src/shader/exacanv110.fpc | 18 +++++++++--------- src/shader/exacmnv110.fp | 10 +++++----- src/shader/exacmnv110.fpc | 18 +++++++++--------- src/shader/exas8nv110.fp | 6 +++---...

...h adds proper delays to maxwell exa shaders. Tested with > rendercheck -f a8r8g8b8. > > I am still wondering whether the rd's are required. We could > still wait on the write bars instead. eg. see > "sched (st 0xf wr 0x1 wt 0x2) (st 0xf wr 0x1 wt 0x2) (st 0xf)" in exacmnv110.fp > > Trello: > https://trello.com/c/6LPB2EIS/174-update-maxwell-shaders-with-proper-delays > > Signed-off-by: Aaryaman Vasishta <jem456.vasishta at gmail.com> > --- > src/shader/exac8nv110.fp | 10 +++++----- > src/shader/exac8nv110.fpc | 18 +++++++++---------...

See the 'wt' on the first fmul in exacanv110.fp, exacmnv110.fp and exasanv110.fp. Any ideas on what could be causing the first fmul to require $r0 and/or $r1? Cheers, Aaryaman On Sat, Jun 10, 2017 at 4:10 PM, Aaryaman Vasishta < jem456.vasishta at gmail.com> wrote: > This patch adds proper delays to maxwell exa shaders. renderchec...

...ch adds proper delays to maxwell exa shaders. Tested with > rendercheck -f a8r8g8b8. > > I am still wondering whether the rd's are required. We could > still wait on the write bars instead. eg. see > "sched (st 0xf wr 0x1 wt 0x2) (st 0xf wr 0x1 wt 0x2) (st 0xf)" in exacmnv110.fp > > Trello: > https://trello.com/c/6LPB2EIS/174-update-maxwell-shaders-with-proper-delays > > Signed-off-by: Aaryaman Vasishta <jem456.vasishta at gmail.com> > --- > src/shader/exac8nv110.fp | 10 +++++----- > src/shader/exac8nv110.fpc | 18 +++++++++--------- >...

...consistent with/without this patch. I haven't extensively tested > them though. > > Trello: > https://trello.com/c/6LPB2EIS/174-update-maxwell-shaders-with-proper-delays > > Signed-off-by: Aaryaman Vasishta <jem456.vasishta at gmail.com> > --- > src/shader/exac8nv110.fp | 10 +++++----- > src/shader/exac8nv110.fpc | 18 +++++++++--------- > src/shader/exacanv110.fp | 10 +++++----- > src/shader/exacanv110.fpc | 18 +++++++++--------- > src/shader/exacmnv110.fp | 10 +++++----- > src/shader/exacmnv110.fpc | 18 +++++++++--------- > src...

...-delays > <https://trello.com/c/6LPB2EIS/174-update-maxwell-shaders-with-proper-delays> > > Signed-off-by: Aaryaman Vasishta <jem456.vasishta at gmail.com > <mailto:jem456.vasishta at gmail.com>> > --- > src/shader/exac8nv110.fp | 10 +++++----- > src/shader/exac8nv110.fpc | 18 +++++++++--------- > src/shader/exacanv110.fp | 10 +++++----- > src/shader/exacanv110.fpc | 18 +++++++++--------- > src/shader/exacmnv110.fp | 10 +++++----- > src/shader/exac...

On 06/10/2017 09:14 AM, Aaryaman Vasishta wrote: > See the 'wt' on the first fmul in exacanv110.fp, exacmnv110.fp and > exasanv110.fp. Any ideas on what could be causing the first fmul to > require $r0 and/or $r1? 'tex nodep $r4 $r2 0x0 0x1 t2d 0xf' is actually: 'tex nodep $r4:$r7 $r2 0x0 0x1 t2d 0xf' Very confusing, I know. > > Cheers, > Aaryaman >...

...r as to when or if there is or will be a Nouveau driver that supports the 980ti. I have been running the proprietary driver back-ported for Debian Jessie, but I'm starting to see some issues, mainly dealing with xrandr12 under wine, and VGA console support for Plymouth. >From what I can see NV110 supports the 980 but it does not explicitly mention the 980ti, and documentation abroad seems scarce. Thanks, Aaron -------------- next part -------------- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/nouveau/attachments/20160327/47301658/attachment.html>

...otebook with Optimus capability (no, this is NOT about Optimus, I don't try to use Optimus yet, so please don't switch off here) with a running Gentoo. The first GPU is an Haswell-based Intel chip, the second one is a nVidia GeForce GTX 850M, the chip is a GM107M, which I understand to be a NV110. So far I have been using the 3.14.8 kernel without CONFIG_DRM_NOUVEAU enabled, as it was lacking of the maxwell support you guys added in May 2014. Today I wanted to try if I could use my card with the nouveau driver (no particular purpose in general, I just thought I could somehow support you guy...

...ll exa shaders. Tested with > > rendercheck -f a8r8g8b8. > > > > I am still wondering whether the rd's are required. We could > > still wait on the write bars instead. eg. see > > "sched (st 0xf wr 0x1 wt 0x2) (st 0xf wr 0x1 wt 0x2) (st 0xf)" in > exacmnv110.fp > > > > Trello: > > https://trello.com/c/6LPB2EIS/174-update-maxwell-shaders-wit > h-proper-delays > > > > Signed-off-by: Aaryaman Vasishta <jem456.vasishta at gmail.com> > > --- > > src/shader/exac8nv110.fp | 10 +++++----- > > src/shad...

First off, the current state of support for Maxwell (GM107/NV110) is not very useful to end-users. It's especially not useful if it's a 3d accelerator card without outputs (as yours appears to be), since acceleration is not supported in 3.15 out of the box. You'd have to figure out how to extract the context switching firmware from the blob driver an...

Removed explicit depar instructions as they're not used by the blob anymore. Signed-off-by: Aaryaman Vasishta <jem456.vasishta at gmail.com> --- src/shader/exac8nv110.fp | 5 ++--- src/shader/exac8nv110.fpc | 10 ++++------ src/shader/exacanv110.fp | 5 ++--- src/shader/exacanv110.fpc | 10 ++++------ src/shader/exacmnv110.fp | 5 ++--- src/shader/exacmnv110.fpc | 10 ++++------ src/shader/exas8nv110.fp | 4 +--- src/shader/exas8nv110.fpc | 8 ++------...

...o.com/c/6LPB2EIS/174-update-maxwell-shaders-wi >> th-proper-delays> >> >> Signed-off-by: Aaryaman Vasishta <jem456.vasishta at gmail.com >> <mailto:jem456.vasishta at gmail.com>> >> >> --- >> src/shader/exac8nv110.fp | 10 +++++----- >> src/shader/exac8nv110.fpc | 18 +++++++++--------- >> src/shader/exacanv110.fp | 10 +++++----- >> src/shader/exacanv110.fpc | 18 +++++++++--------- >> src/shader/exacmnv110.fp | 10 +++++----- >>...