Displaying 2 results from an estimated 2 matches for "nv10_gpio_init".
2012 Apr 22
2
[RFC PATCH 5/5] drm/nouveau: gpu lockup recovery
...) {}
+#endif
+int nouveau_reset_device(struct drm_device *dev);
+static inline bool nouveau_gpu_reset_in_progress(struct drm_device *dev)
+{
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ return atomic_read(&dev_priv->gpureset_in_progress) != 0;
+}
/* nv10_gpio.c */
int nv10_gpio_init(struct drm_device *dev);
@@ -1632,12 +1651,20 @@ static inline void nv_wr08(struct drm_device *dev, unsigned reg, u8 val)
iowrite8(val, dev_priv->mmio + reg);
}
+static inline uint64_t nv_timeout(struct drm_device *dev)
+{
+ uint64_t tm = 2000000000ULL;
+ if (nouveau_gpu_reset_in_progress(d...
2012 Apr 25
5
[PATCH v2 4/4] drm/nouveau: gpu lockup recovery
...) {}
+#endif
+int nouveau_reset_device(struct drm_device *dev);
+static inline bool nouveau_gpu_reset_in_progress(struct drm_device *dev)
+{
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ return atomic_read(&dev_priv->gpureset_in_progress) != 0;
+}
/* nv10_gpio.c */
int nv10_gpio_init(struct drm_device *dev);
@@ -1632,12 +1663,20 @@ static inline void nv_wr08(struct drm_device *dev, unsigned reg, u8 val)
iowrite8(val, dev_priv->mmio + reg);
}
+static inline uint64_t nv_timeout(struct drm_device *dev)
+{
+ uint64_t tm = 2000000000ULL;
+ if (nouveau_gpu_reset_in_progress(d...