Displaying 20 results from an estimated 32 matches for "nv04_resourc".
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nv04_resource
2014 Mar 01
1
[PATCH] nouveau: add valid range tracking to nouveau_buffer
.../* Set up a staging area for the user to write to. It will be copied
@@ -492,8 +507,14 @@ nouveau_buffer_transfer_flush_region(struct pipe_context *pipe,
const struct pipe_box *box)
{
struct nouveau_transfer *tx = nouveau_transfer(transfer);
+ struct nv04_resource *buf = nv04_resource(transfer->resource);
+
if (tx->map)
nouveau_transfer_write(nouveau_context(pipe), tx, box->x, box->width);
+
+ util_range_add(&buf->valid_buffer_range,
+ tx->base.box.x + box->x,
+ tx->base.box.x + box-...
2014 Jan 15
3
[PATCH] nv50, nvc0: don't crash on a null cbuf
...src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c
@@ -72,9 +72,17 @@ nvc0_validate_fb(struct nvc0_context *nvc0)
PUSH_DATA (push, fb->height << 16);
for (i = 0; i < fb->nr_cbufs; ++i) {
- struct nv50_surface *sf = nv50_surface(fb->cbufs[i]);
- struct nv04_resource *res = nv04_resource(sf->base.texture);
- struct nouveau_bo *bo = res->bo;
+ struct nv50_surface *sf;
+ struct nv04_resource *res;
+ struct nouveau_bo *bo;
+
+ /* Do we need to clear the old RT settings? */
+ if (!fb->cbufs[i])
+ continu...
2014 May 27
1
[PATCH V3] nvc0: implement clear_buffer
...6 @@ nvc0_clear_render_target(struct pipe_context *pipe,
}
static void
+nvc0_clear_buffer_cpu(struct pipe_context *pipe,
+ struct pipe_resource *res,
+ unsigned offset, unsigned size,
+ const void *data, int data_size)
+{
+ struct nv04_resource *buf = nv04_resource(res);
+ struct pipe_transfer *pt;
+ struct pipe_box box;
+ unsigned elements, i;
+
+ elements = size / data_size;
+
+ u_box_1d(0, size, &box);
+
+ uint8_t *map = buf->vtbl->transfer_map(pipe, res, 0, PIPE_TRANSFER_WRITE,
+...
2014 May 26
1
[PATCH V2] nvc0: implement clear_buffer
...6 @@ nvc0_clear_render_target(struct pipe_context *pipe,
}
static void
+nvc0_clear_buffer_cpu(struct pipe_context *pipe,
+ struct pipe_resource *res,
+ unsigned offset, unsigned size,
+ const void *data, int data_size)
+{
+ struct nv04_resource *buf = nv04_resource(res);
+ struct pipe_transfer *pt;
+ struct pipe_box box;
+ unsigned elements, i;
+
+ elements = size / data_size;
+
+ u_box_1d(0, size, &box);
+
+ uint8_t *tf_map = buf->vtbl->transfer_map(pipe, res,
+ 0, PIPE_TRANSFER_WRITE, &box, &pt)...
2014 Jan 23
2
[PATCH v2] nv50, nvc0: clear out RT on a null cbuf
...0_context *nvc0)
> {
> @@ -72,9 +85,18 @@ nvc0_validate_fb(struct nvc0_context *nvc0)
> PUSH_DATA (push, fb->height << 16);
>
> for (i = 0; i < fb->nr_cbufs; ++i) {
> - struct nv50_surface *sf = nv50_surface(fb->cbufs[i]);
> - struct nv04_resource *res = nv04_resource(sf->base.texture);
> - struct nouveau_bo *bo = res->bo;
> + struct nv50_surface *sf;
> + struct nv04_resource *res;
> + struct nouveau_bo *bo;
> +
> + if (!fb->cbufs[i]) {
> + nvc0_fb_set_null_rt(push,...
2014 May 26
2
Implement buffer_clear for nvc0
Hi, please review the following patch!
Thanks,
Tobias Klausmann
2013 Dec 02
2
[PATCH] nouveau: Add lots of comments to the buffer transfer logic
...r *tx,
nouveau_fence_ref(nv->screen->fence.current, &buf->fence_wr);
}
-
+/* Does a CPU wait for the buffer's backing data to become reliably accessible
+ * for write/read by waiting on the buffer's relevant fences.
+ */
static INLINE boolean
nouveau_buffer_sync(struct nv04_resource *buf, unsigned rw)
{
@@ -283,6 +292,7 @@ nouveau_buffer_transfer_del(struct nouveau_context *nv,
}
}
+/* Creates a cache in system memory of the buffer data. */
static boolean
nouveau_buffer_cache(struct nouveau_context *nv, struct nv04_resource *buf)
{
@@ -317,6 +327,10 @@ nouveau_buff...
2015 Feb 14
2
[PATCH 1/2] st/mesa: treat resource-less xfb buffers as if they weren't there
If a transform feedback buffer's size is 0, st_bufferobj_data doesn't
end up creating a buffer for it. There's no point in trying to write to
such a buffer, so just pretend as if it's not really there.
This fixes arb_gpu_shader5-xfb-streams-without-invocations on nvc0.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
src/mesa/state_tracker/st_cb_xformfb.c | 2 +-
1
2014 Jan 17
0
[PATCH v2] nv50, nvc0: clear out RT on a null cbuf
...c void
nvc0_validate_fb(struct nvc0_context *nvc0)
{
@@ -72,9 +85,18 @@ nvc0_validate_fb(struct nvc0_context *nvc0)
PUSH_DATA (push, fb->height << 16);
for (i = 0; i < fb->nr_cbufs; ++i) {
- struct nv50_surface *sf = nv50_surface(fb->cbufs[i]);
- struct nv04_resource *res = nv04_resource(sf->base.texture);
- struct nouveau_bo *bo = res->bo;
+ struct nv50_surface *sf;
+ struct nv04_resource *res;
+ struct nouveau_bo *bo;
+
+ if (!fb->cbufs[i]) {
+ nvc0_fb_set_null_rt(push, i);
+ continue;
+...
2014 May 26
0
[PATCH] nvc0: Implement buffer_clear for this type of hardware
...ce *res,
+ unsigned offset, unsigned size,
+ const void *data, int data_size)
+{
+ // FIXME: Find a way to do this with the GPU!
+
+ struct nvc0_context *nvc0 = nvc0_context(pipe);
+ struct nouveau_pushbuf *push = nvc0->base.pushbuf;
+ struct nv04_resource *buf = nv04_resource(res);
+
+ struct pipe_transfer *pt;
+ struct pipe_box pb;
+ unsigned elements, i;
+ union pipe_color_union color;
+
+ if (buf->fence_wr && !nouveau_fence_signalled(buf->fence_wr))
+ nouveau_fence_wait(buf->fence_wr);
+
+ memcpy(&colo...
2014 Jan 23
0
[PATCH v2] nv50, nvc0: clear out RT on a null cbuf
...{
>> @@ -72,9 +85,18 @@ nvc0_validate_fb(struct nvc0_context *nvc0)
>> PUSH_DATA (push, fb->height << 16);
>>
>> for (i = 0; i < fb->nr_cbufs; ++i) {
>> - struct nv50_surface *sf = nv50_surface(fb->cbufs[i]);
>> - struct nv04_resource *res = nv04_resource(sf->base.texture);
>> - struct nouveau_bo *bo = res->bo;
>> + struct nv50_surface *sf;
>> + struct nv04_resource *res;
>> + struct nouveau_bo *bo;
>> +
>> + if (!fb->cbufs[i]) {
>> +...
2016 Jun 05
0
[RFC PATCH] nouveau: add locking
...gallium/drivers/nouveau/nouveau_buffer.c
@@ -380,6 +380,7 @@ nouveau_buffer_transfer_map(struct pipe_context *pipe,
struct pipe_transfer **ptransfer)
{
struct nouveau_context *nv = nouveau_context(pipe);
+ struct nouveau_screen *screen = nv->screen;
struct nv04_resource *buf = nv04_resource(resource);
struct nouveau_transfer *tx = MALLOC_STRUCT(nouveau_transfer);
uint8_t *map;
@@ -426,15 +427,20 @@ nouveau_buffer_transfer_map(struct pipe_context *pipe,
align_free(buf->data);
buf->data = NULL;
}
+...
2012 Oct 28
4
[Bug 56474] New: 3D app segfaults on NV46
...res"
21:17 < gg0> (gdb) up
21:17 < gg0> #1 nv30_vbo_validate (nv30=0x94c2658) at nv30_vbo.c:239
21:17 < gg0> 239I PUSH_RESRC(push, NV30_3D(VTXBUF(i)), user ?
BUFCTX_VTXTMP : BUFCTX_VTXBUF,
21:17 < gg0> (gdb) print res
21:17 < gg0> $4 = (struct nv04_resource *) 0x0
21:35 < joi> gg0: try this one: http://bpaste.net/show/54017/
diff --git a/src/gallium/drivers/nv30/nv30_vbo.c
b/src/gallium/drivers/nv30/nv30_vbo.c
index 128457f..94febc3 100644
--- a/src/gallium/drivers/nv30/nv30_vbo.c
+++ b/src/gallium/drivers/nv30/nv30_vbo.c
@@ -226,6 +226,8 @@...
2016 Feb 15
2
[PATCH 23/23] nvc0: implement support for maxwell texture headers
...> + tic[4] |= GM107_TIC2_4_SRGB_CONVERSION;
> +
> + if (!(flags & NV50_TEXVIEW_SCALED_COORDS))
> + tic[5] = GM107_TIC2_5_NORMALIZED_COORDS;
> + else
> + tic[5] = 0;
> +
> + /* check for linear storage type */
> + if (unlikely(!nouveau_bo_memtype(nv04_resource(texture)->bo))) {
> + if (texture->target == PIPE_BUFFER) {
> + assert(!(tic[5] & GM107_TIC2_5_NORMALIZED_COORDS));
> + width = view->pipe.u.buf.last_element - view->pipe.u.buf.first_element;
> + address +=
> + view->pipe.u....
2014 Jun 17
0
[PATCH try 2 2/2] gallium/nouveau: move pushbuf and fences to context
...ate(&screen->fence, TRUE);
+ nouveau_fence_next(&nv30->base.fence);
+ nouveau_fence_update(&nv30->base.fence, TRUE);
if (push->bufctx) {
struct nouveau_bufref *bref;
LIST_FOR_EACH_ENTRY(bref, &push->bufctx->current, thead) {
struct nv04_resource *res = bref->priv;
if (res && res->mm) {
- nouveau_fence_ref(screen->fence.current, &res->fence);
+ nouveau_fence_ref(nv30->base.fence.current, &res->fence);
if (bref->flags & NOUVEAU_BO_RD)
res...
2014 Jun 17
2
[PATCH try 2 1/2] gallium/nouveau: decouple nouveau_fence implementation from screen
Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com>
---
src/gallium/drivers/nouveau/nouveau_fence.c | 76 ++++++++++++-------------
src/gallium/drivers/nouveau/nouveau_fence.h | 22 +++++--
src/gallium/drivers/nouveau/nouveau_screen.c | 9 +++
src/gallium/drivers/nouveau/nouveau_screen.h | 14 ++---
src/gallium/drivers/nouveau/nv30/nv30_context.c | 4 +-
2014 Jun 21
3
[Mesa-dev] [PATCH try 2 2/2] gallium/nouveau: move pushbuf and fences to context
...> + nouveau_fence_next(&nv30->base.fence);
> + nouveau_fence_update(&nv30->base.fence, TRUE);
>
> if (push->bufctx) {
> struct nouveau_bufref *bref;
> LIST_FOR_EACH_ENTRY(bref, &push->bufctx->current, thead) {
> struct nv04_resource *res = bref->priv;
> if (res && res->mm) {
> - nouveau_fence_ref(screen->fence.current, &res->fence);
> + nouveau_fence_ref(nv30->base.fence.current, &res->fence);
>
> if (bref->flags & NOUVEAU_BO_...
2016 Feb 15
0
[PATCH 23/23] nvc0: implement support for maxwell texture headers
...t;colorspace == UTIL_FORMAT_COLORSPACE_SRGB)
+ tic[4] |= GM107_TIC2_4_SRGB_CONVERSION;
+
+ if (!(flags & NV50_TEXVIEW_SCALED_COORDS))
+ tic[5] = GM107_TIC2_5_NORMALIZED_COORDS;
+ else
+ tic[5] = 0;
+
+ /* check for linear storage type */
+ if (unlikely(!nouveau_bo_memtype(nv04_resource(texture)->bo))) {
+ if (texture->target == PIPE_BUFFER) {
+ assert(!(tic[5] & GM107_TIC2_5_NORMALIZED_COORDS));
+ width = view->pipe.u.buf.last_element - view->pipe.u.buf.first_element;
+ address +=
+ view->pipe.u.buf.first_element * desc-...
2015 Nov 19
7
[Bug 93004] New: Guild Wars 2 crash on nouveau DX11 cards
https://bugs.freedesktop.org/show_bug.cgi?id=93004
Bug ID: 93004
Summary: Guild Wars 2 crash on nouveau DX11 cards
Product: Mesa
Version: git
Hardware: Other
OS: All
Status: NEW
Severity: normal
Priority: medium
Component: Drivers/DRI/nouveau
Assignee: nouveau at
2016 Feb 15
0
[PATCH 23/23] nvc0: implement support for maxwell texture headers
..._4_SRGB_CONVERSION;
>> +
>> + if (!(flags & NV50_TEXVIEW_SCALED_COORDS))
>> + tic[5] = GM107_TIC2_5_NORMALIZED_COORDS;
>> + else
>> + tic[5] = 0;
>> +
>> + /* check for linear storage type */
>> + if (unlikely(!nouveau_bo_memtype(nv04_resource(texture)->bo))) {
>> + if (texture->target == PIPE_BUFFER) {
>> + assert(!(tic[5] & GM107_TIC2_5_NORMALIZED_COORDS));
>> + width = view->pipe.u.buf.last_element - view->pipe.u.buf.first_element;
>> + address +=
>> +...