Displaying 5 results from an estimated 5 matches for "numphysicaloperands".
2017 Sep 04
2
Issues in Vector Add Instruction Machine Code Emission
Thank You.
I used EVEX_4V with all the instructions. I replaced TA and EVEX both with
EVEX_4V. Now, I am getting following error:
llvm-tblgen: /utils/TableGen/X86RecognizableInstr.cpp:687: void
llvm::X86Disassembler::RecognizableInstr::emitInstructionSpecifier():
Assertion `numPhysicalOperands >= 2 + additionalOperands &&
numPhysicalOperands <= 4 + additionalOperands && "Unexpected number of
operands for MRMSrcMemFrm"' failed
What to do now?
On Tue, Sep 5, 2017 at 4:23 AM, Craig Topper <craig.topper at gmail.com> wrote:
> VEX_4V tells the e...
2017 Sep 05
2
Issues in Vector Add Instruction Machine Code Emission
...EX_4V with all the instructions. I replaced TA and EVEX both
>> with EVEX_4V. Now, I am getting following error:
>>
>> llvm-tblgen: /utils/TableGen/X86RecognizableInstr.cpp:687: void
>> llvm::X86Disassembler::RecognizableInstr::emitInstructionSpecifier():
>> Assertion `numPhysicalOperands >= 2 + additionalOperands &&
>> numPhysicalOperands <= 4 + additionalOperands && "Unexpected number of
>> operands for MRMSrcMemFrm"' failed
>>
>> What to do now?
>>
>> On Tue, Sep 5, 2017 at 4:23 AM, Craig Topper <craig.top...
2017 Sep 05
2
Issues in Vector Add Instruction Machine Code Emission
...ced TA and EVEX both
>>>> with EVEX_4V. Now, I am getting following error:
>>>>
>>>> llvm-tblgen: /utils/TableGen/X86RecognizableInstr.cpp:687: void
>>>> llvm::X86Disassembler::RecognizableInstr::emitInstructionSpecifier():
>>>> Assertion `numPhysicalOperands >= 2 + additionalOperands &&
>>>> numPhysicalOperands <= 4 + additionalOperands && "Unexpected number of
>>>> operands for MRMSrcMemFrm"' failed
>>>>
>>>> What to do now?
>>>>
>>>> On Tue, Se...
2017 Aug 07
3
VBROADCAST Implementation Issues
...64f32 (masked_gather (VR_2048:$src1),
(VK64WM:$mask),(addr:$src2))), (GATHER_256B VR_2048:$src1, VK64WM:$mask,
addr:$src2)>;
Now getting this error:
llvm-tblgen: /utils/TableGen/X86RecognizableInstr.cpp:687: void
llvm::X86Disassembler::RecognizableInstr::emitInstructionSpecifier():
Assertion `numPhysicalOperands >= 2 + additionalOperands &&
numPhysicalOperands <= 4 + additionalOperands && "Unexpected number of
operands for MRMSrcMemFrm"' failed.
On Mon, Aug 7, 2017 at 8:23 PM, Craig Topper <craig.topper at gmail.com> wrote:
> masked_gather takes 3 input...
2017 Sep 04
2
Issues in Vector Add Instruction Machine Code Emission
Sorry to ask but what does it mean to put both?
On Tue, Sep 5, 2017 at 4:01 AM, Craig Topper <craig.topper at gmail.com> wrote:
> Leave TA. Put both.
>
> ~Craig
>
> On Mon, Sep 4, 2017 at 4:00 PM, hameeza ahmed <hahmed2305 at gmail.com>
> wrote:
>
>> You are right. But when i defined my instruction as follows:
>> def P_256B_VADD : I<0xE1,