Displaying 5 results from an estimated 5 matches for "nummioperands".
2012 Aug 15
5
[LLVMdev] More Back-End Porting Troubles
...o insert such nodes into the DAG within
TriCoreTargetLowering, I run into an assertion:
llc: /home/scheler/git/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp:704:
void llvm::InstrEmitter::EmitMachineNode(llvm::SDNode*, bool, bool,
llvm::DenseMap<llvm::SDValue, unsigned int>&): Assertion
`NumMIOperands >= II.getNumOperands() && NumMIOperands <=
II.getNumOperands()+II.getNumImplicitDefs() && "#operands for dag node
doesn't match .td file!"' failed.
Currently, I am not even able to find out which instruction is messed
up here (dumping the node via the dump-...
2012 Aug 15
0
[LLVMdev] More Back-End Porting Troubles
...thin
> TriCoreTargetLowering, I run into an assertion:
>
> llc:
> /home/scheler/git/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp:704:
> void llvm::InstrEmitter::EmitMachineNode(llvm::SDNode*, bool, bool,
> llvm::DenseMap<llvm::SDValue, unsigned int>&): Assertion
> `NumMIOperands >= II.getNumOperands() && NumMIOperands <=
> II.getNumOperands()+II.getNumImplicitDefs() && "#operands for dag node
> doesn't match .td file!"' failed.
>
> Currently, I am not even able to find out which instruction is messed
> up here (dumpi...
2012 Aug 16
2
[LLVMdev] More Back-End Porting Troubles
...Lowering, I run into an assertion:
>>
>> llc:
>> /home/scheler/git/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp:704:
>> void llvm::InstrEmitter::EmitMachineNode(llvm::SDNode*, bool, bool,
>> llvm::DenseMap<llvm::SDValue, unsigned int>&): Assertion
>> `NumMIOperands >= II.getNumOperands() && NumMIOperands <=
>> II.getNumOperands()+II.getNumImplicitDefs() && "#operands for dag node
>> doesn't match .td file!"' failed.
>>
>> Currently, I am not even able to find out which instruction is messed
>&...
2005 Aug 11
1
[LLVMdev] Define an instruction with many operands
...what has been done to complex X86 addressing mode. A
single 32-bit immediate (i32) encodes how to add many MachineOperands
to the MachineInstr object (With the help of functions in
X86InstrBuilder.h).
// similar to X86MemOperand in X86InstrInfo.td !!
class ManyOperands : Operand<i32> {
let NumMIOperands = 100; // a very large number
let PrintMethod = "printManyOperands";
}
def MO : ManyOperands;
def FOOBAR: Instruction<(ops MO:$operands), "foobar {$operands}">;
(2) 'Collapse' all operands in .td file. Contrary to method (1), each
operand is explicitly specifi...
2012 Aug 16
0
[LLVMdev] More Back-End Porting Troubles
...ion:
> >>
> >> llc:
> >> /home/scheler/git/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp:704:
> >> void llvm::InstrEmitter::EmitMachineNode(llvm::SDNode*, bool, bool,
> >> llvm::DenseMap<llvm::SDValue, unsigned int>&): Assertion
> >> `NumMIOperands >= II.getNumOperands() && NumMIOperands <=
> >> II.getNumOperands()+II.getNumImplicitDefs() && "#operands for dag
> >> node doesn't match .td file!"' failed.
> >>
> >> Currently, I am not even able to find out which instruc...