Displaying 20 results from an estimated 35 matches for "num_reg".
2012 Jan 15
0
[CENTOS6] mtrr_cleanup: can not find optimal value - during server startup
...MB, type UC
reg 3, base: 3264MB, range: 64MB, type UC
reg 4, base: 3328MB, range: 256MB, type UC
reg 5, base: 3584MB, range: 512MB, type UC
reg 6, base: 17150MB, range: 2MB, type UC
reg 7, base: 17152MB, range: 256MB, type UC
total RAM covered: 16310M
gran_size: 64K chunk_size: 64K num_reg: 10 lose cover
RAM: 126M
gran_size: 64K chunk_size: 128K num_reg: 10 lose cover
RAM: 126M
gran_size: 64K chunk_size: 256K num_reg: 10 lose cover
RAM: 126M
gran_size: 64K chunk_size: 512K num_reg: 10 lose cover
RAM: 126M
gran_size:...
2012 Nov 03
0
mtrr_gran_size and mtrr_chunk_size
...7GB, range: 256MB, type WB
reg 3, base: 3GB, range: 1GB, type UC
reg 4, base: 2816MB, range: 256MB, type UC
reg 5, base: 2752MB, range: 64MB, type UC
reg 6, base: 2736MB, range: 16MB, type UC
reg 7, base: 17656MB, range: 8MB, type UC
total RAM covered: 16296M
gran_size: 64K chunk_size: 64K num_reg: 10 lose cover RAM: 56M
gran_size: 64K chunk_size: 128K num_reg: 10 lose cover RAM:
56M
gran_size: 64K chunk_size: 256K num_reg: 10 lose cover RAM:
56M
gran_size: 64K chunk_size: 512K num_reg: 10 lose cover RAM:
56M
gran_size: 64K chunk_size: 1M...
2012 Apr 12
1
6.2 x86_64 "mtrr_cleanup: can not find optimal value"
...t only supports 8gb of memory and
therefore mtrr cannot remap memory above 8gb? (assuming not since
problem did not exist in 5.x centos)
-- Mike
Bios Memory remap feature: enabled
Apr 11 17:25:36 kernel: total RAM covered: 8183M
Apr 11 17:25:36 kernel: gran_size: 64K chunk_size: 64K num_reg: 8 lose cover RAM: 4865M
Apr 11 17:25:36 kernel: gran_size: 64K chunk_size: 128K num_reg: 8 lose cover RAM: 4865M
Apr 11 17:25:36 kernel: gran_size: 64K chunk_size: 256K num_reg: 8 lose cover RAM: 4865M
Apr 11 17:25:36 kernel: gran_size: 64K chunk_size: 512K...
2013 Jun 13
0
*BAD*gran_size
...R720.
Had an issue today with a bus error, and googling only found two year old
references to problems with non-Dell drives (we just added two WD Reds,
and mdadm raided them).
So, looking through dmesg and /var/log/messages, I ran into a *lot* of
G
gran_size: 128K chunk_size: 256K num_reg: 10 lose cover
RAM:
0G
gran_size: 128K chunk_size: 512K num_reg: 10 lose cover
RAM:
0G
gran_size: 128K chunk_size: 1M num_reg: 10 lose cover RAM: 0G
gran_size: 128K chunk_size: 2M num_reg: 10 lose cover RAM: 0G
gran_size: 128K chunk_size: 4M...
2005 Sep 03
1
Current status on _outgoing_ Swedish/Dutch DTMF CLIP for TDM400 FXS interfaces?
...f Volts\n", (float)stats.ringvolt
/ 1000.0);
printf("VBAT: %7.4f Volts\n", (float)stats.batvolt /
1000.0);
}
} else if (!strcasecmp(argv[2], "regdump")) {
struct wctdm_regs regs;
int numregs = NUM_REGS;
memset(®s, 0, sizeof(regs));
res = ioctl(fd, WCTDM_GET_REGS, ®s);
if (res) {
fprintf(stderr, "Unable to get registers on channel
%s\n", argv[1]);
} else {
for (...
2010 Oct 05
2
[LLVMdev] gold-plugin build errors
...rror: expected declaration
specifiers or ‘...’ before ‘ptrace_arg3_type’
../../.././rda/unix/linux-target.c:1620:2: error: #error Need a
_LINUX_TARGET define for your architecture
../../.././rda/unix/linux-target.c: In function ‘linux_next_gg_reg’:
../../.././rda/unix/linux-target.c:1643: error: ‘NUM_REGS’ undeclared
(first use in this function)
../../.././rda/unix/linux-target.c:1643: error: (Each undeclared
identifier is reported only once
../../.././rda/unix/linux-target.c:1643: error: for each function it
appears in.)
../../.././rda/unix/linux-target.c: In function ‘linux_gg_reg_nr’:
../../....
2007 Jun 20
3
dovecot -n segfault
# uname -a
Linux ns2 2.6.18-4-sparc64 #1 Mon Mar 26 11:16:07 UTC 2007 sparc64
GNU/Linux
# dovecot -n
# 1.0.1: /usr/local/etc/dovecot.conf
Segmentation fault
uhu?
ciao
Luca
2003 Apr 28
1
Red Hat 9 regex symbol conflict
...***
Unless this function is called, the first search or match using
PATTERN_BUFFER will allocate its own register data, without
freeing the old data. */
! extern void re_set_registers
_RE_ARGS ((struct re_pattern_buffer *buffer, struct re_registers *regs,
unsigned num_regs, regoff_t *starts, regoff_t *ends));
--- 512,518 ----
Unless this function is called, the first search or match using
PATTERN_BUFFER will allocate its own register data, without
freeing the old data. */
! static void re_set_registers
_RE_ARGS ((struct re_pattern_buffer *buff...
2013 Jul 25
0
[PATCH 1/5] Intel MIC Host Driver for X100 family.
...t;Snoop", "RegDMAAddr");
+ seq_puts(s, "====================================================\n");
+
+ if (mdev->smpt) {
+ struct mic_smpt_info *smpt_info = mdev->smpt;
+ spin_lock_irqsave(&smpt_info->smpt_lock, flags);
+ for (i = 0; i < smpt_info->info.num_reg; i++) {
+ u32 val = mic_mmio_read(&mdev->mmio,
+ MIC_X100_SBOX_BASE_ADDRESS +
+ MIC_X100_SBOX_SMPT00 + (4 * i));
+ seq_printf(s, "%9s|%-10d| %-#14llx %-10lld %-#10x",
+ " ", i, smpt_info->entry[i].dma_addr,
+ smpt_info->entry[i].ref_count, val);
+...
2010 Jan 17
1
[PATCH 1/2] nv40: don't crash on empty fragment program
...m/drivers/nv40/nv40_fragprog.c b/src/gallium/drivers/nv40/nv40_fragprog.c
index 1237066..209d211 100644
--- a/src/gallium/drivers/nv40/nv40_fragprog.c
+++ b/src/gallium/drivers/nv40/nv40_fragprog.c
@@ -843,7 +843,8 @@ nv40_fragprog_translate(struct nv40_context *nv40,
fp->fp_control |= fpc->num_regs << NV40TCL_FP_CONTROL_TEMP_COUNT_SHIFT;
/* Terminate final instruction */
- fp->insn[fpc->inst_offset] |= 0x00000001;
+ if(fp->insn)
+ fp->insn[fpc->inst_offset] |= 0x00000001;
/* Append NOP + END instruction, may or may not be necessary. */
fpc->in...
2014 Feb 21
3
[PATCH 1/4] nv30: remove use_nv4x, it is identical to is_nv4x
...return FALSE;
}
@@ -1129,7 +1129,7 @@ _nvfx_fragprog_translate(struct nv30_context *nvfx, struct nv30_fragprog *fp,
if (!fpc)
goto out_err;
- fpc->max_temps = nvfx->use_nv4x ? 48 : 32;
+ fpc->max_temps = nvfx->is_nv4x ? 48 : 32;
fpc->fp = fp;
fpc->num_regs = 2;
memset(fp->texcoord, 0xff, sizeof(fp->texcoord));
diff --git a/src/gallium/drivers/nouveau/nv30/nvfx_vertprog.c b/src/gallium/drivers/nouveau/nv30/nvfx_vertprog.c
index 3ae51ef..7642c5e 100644
--- a/src/gallium/drivers/nouveau/nv30/nvfx_vertprog.c
+++ b/src/gallium/drivers/nouveau/n...
2013 Sep 06
0
[PATCH RESEND v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
...efCount");
seq_puts(s, "====================================================\n");
if (mdev->smpt) {
@@ -111,8 +111,8 @@ static int mic_smpt_show(struct seq_file *s, void *pos)
spin_lock_irqsave(&smpt_info->smpt_lock, flags);
for (i = 0; i < smpt_info->info.num_reg; i++) {
seq_printf(s, "%9s|%-10d| %-#14llx %-10lld\n",
- " ", i, smpt_info->entry[i].dma_addr,
- smpt_info->entry[i].ref_count);
+ " ", i, smpt_info->entry[i].dma_addr,
+ smpt_info->entry[i].ref_count);
}
spin_unlock_irqrestore...
2013 Nov 01
17
[PATCH v2 00/14] xen: arm: 64-bit guest support and domU FDT autogeneration
I''ve addressed all (I think/hope) of the review comments.
The main change is to expose the guest virtual platform (e.g. memory
layout and interrupt usage etc) to the toolstack via the public
interface. This is then used during FDT generation. I have just codified
the current defacto standard layout, it''s probably not the best layout
but any change can be a separate patch/series.
2013 Sep 05
16
[PATCH RESEND v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog:
=========
v2 => v3:
a) Patch 1 data structure cleanups, header file include cleanups,
IDA interface reuse and switching to device_create_with_groups(..)
as per feedback from Greg Kroah-Hartman.
b) Patch 7 signal documentation, sleep workaround removal and sysfs
access API cleanups as per feedback from Michael S. Tsirkin.
v1 => v2: @ http://lwn.net/Articles/563131/
a)
2013 Sep 05
16
[PATCH RESEND v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog:
=========
v2 => v3:
a) Patch 1 data structure cleanups, header file include cleanups,
IDA interface reuse and switching to device_create_with_groups(..)
as per feedback from Greg Kroah-Hartman.
b) Patch 7 signal documentation, sleep workaround removal and sysfs
access API cleanups as per feedback from Michael S. Tsirkin.
v1 => v2: @ http://lwn.net/Articles/563131/
a)
2013 Aug 21
10
[PATCH v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog:
=========
v2 => v3:
a) Patch 1 data structure cleanups, header file include cleanups,
IDA interface reuse and switching to device_create_with_groups(..)
as per feedback from Greg Kroah-Hartman.
b) Patch 7 signal documentation, sleep workaround removal and sysfs
access API cleanups as per feedback from Michael S. Tsirkin.
v1 => v2: @ http://lwn.net/Articles/563131/
a)
2013 Aug 21
10
[PATCH v3 0/7] Enable Drivers for Intel MIC X100 Coprocessors.
ChangeLog:
=========
v2 => v3:
a) Patch 1 data structure cleanups, header file include cleanups,
IDA interface reuse and switching to device_create_with_groups(..)
as per feedback from Greg Kroah-Hartman.
b) Patch 7 signal documentation, sleep workaround removal and sysfs
access API cleanups as per feedback from Michael S. Tsirkin.
v1 => v2: @ http://lwn.net/Articles/563131/
a)
2013 Nov 19
23
[PATCH v6 00/16] xen: arm: 64-bit guest support and domU FDT autogeneration
Biggest change is to switch the new DTB node to /xen-core-devices
instead of /xen at Stefano''s request.
I also dropped the few patches title HACK etc which weren''t supposed to
be there and fixed up some bits and pieces which folks commented on.
George, WRT the freeze I think this is functionality which we cannot
ship Xen 4.4 without. The impact is entirely constrained to the
2013 Jul 25
16
[PATCH 0/5] Enable Drivers for Intel MIC X100 Coprocessors.
An Intel MIC X100 device is a PCIe form factor add-in coprocessor
card based on the Intel Many Integrated Core (MIC) architecture
that runs a Linux OS. It is a PCIe endpoint in a platform and therefore
implements the three required standard address spaces i.e. configuration,
memory and I/O. The host OS loads a device driver as is typical for
PCIe devices. The card itself runs a bootstrap after
2013 Jul 25
16
[PATCH 0/5] Enable Drivers for Intel MIC X100 Coprocessors.
An Intel MIC X100 device is a PCIe form factor add-in coprocessor
card based on the Intel Many Integrated Core (MIC) architecture
that runs a Linux OS. It is a PCIe endpoint in a platform and therefore
implements the three required standard address spaces i.e. configuration,
memory and I/O. The host OS loads a device driver as is typical for
PCIe devices. The card itself runs a bootstrap after